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IMP1232LPEMA 데이터시트(PDF) 2 Page - IMP, Inc

부품명 IMP1232LPEMA
상세설명  5V 關P Power Suppl er Supply Monit y Monitor and or and Reset Cir eset Circuit
PDF  7 Pages
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제조업체  IMP [IMP, Inc]
홈페이지  http://www.ds-imp.com.cn/index.asp
Logo IMP - IMP, Inc

IMP1232LPEMA 데이터시트(HTML) 2 Page - IMP, Inc

  IMP1232LPEMA Datasheet HTML 1Page - IMP, Inc IMP1232LPEMA Datasheet HTML 2Page - IMP, Inc IMP1232LPEMA Datasheet HTML 3Page - IMP, Inc IMP1232LPEMA Datasheet HTML 4Page - IMP, Inc IMP1232LPEMA Datasheet HTML 5Page - IMP, Inc IMP1232LPEMA Datasheet HTML 6Page - IMP, Inc IMP1232LPEMA Datasheet HTML 7Page - IMP, Inc  
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408-432-9100/www.impweb.com
©
1999 IMP, Inc.
Pin Configuration
IMP1
IMP1232LP/LPS
232LP/LPS
Pin Descriptions
IMP1232LP
IMP1232LPS-2
IMP1232LPCMA
IMP1232LPEMA
5
1232_01.eps
RESET
6 RESET
7ST
8
4
3
2
1VCC
GND
TOL
TD
PBRST
Ordering Information
1232_02.eps
IMP1232LPSN
13 ST
14 NC
15 VCC
16
4
3
2
1NC
TD
12 NC
5
NC
11 RESET
6
TOL
10 NC
7
NC
9 RESET
8
GND
NC
PBRST
NC
DIP/SO/MicroSO
SO
r
e
b
m
u
N
t
r
a
Pe
g
a
k
c
a
P
e
r
u
t
a
r
e
p
m
e
T
g
n
i
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a
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e
p
O
e
g
n
a
R
y
l
p
p
u
S
m
u
m
i
x
a
M
(
t
n
e
r
r
u
C
µ )
A
g
n
i
r
o
t
i
n
o
M
e
g
a
t
l
o
V
n
o
i
t
a
c
i
l
p
p
A
P
L
2
3
2
1
P
M
IP
I
D
-
80 C
°
0
7
o
tC
°
0
3V
5
S
P
L
2
3
2
1
P
M
IO
S
-
6
10 C
°
0
7
o
tC
°
0
3V
5
2
-
S
P
L
2
3
2
1
P
M
IO
S
-
80 C
°
0
7
o
tC
°
0
3V
5
A
M
C
P
L
2
3
2
1
P
M
IO
S
o
r
c
i
M
-
80 C
°
0
7
o
tC
°
0
3V
5
A
M
E
P
L
2
3
2
1
P
M
IO
S
o
r
c
i
M
-
80
4
–
C
°
5
8
o
tC
°
0
3V
5
N
P
L
2
3
2
1
P
M
IP
I
D
-
80
4
–
C
°
5
8
o
tC
°
0
3V
5
2
-
N
S
P
L
2
3
2
1
P
M
IO
S
-
80
4
–
C
°
5
8
o
tC
°
0
3V
5
N
S
P
L
2
3
2
1
P
M
IO
S
-
6
10
4
–
C
°
5
8
o
tC
°
0
3V
5
s
p
e
.
1
0
t
_
2
3
2
1
Pin Number
Pin Number
8-Pin P
8-Pin Pac
ack
kag
agee
116-Pin P
6-Pin Pac
ack
kag
agee
N
Name
ame
F
Function
unction
1
2
PBRST
Debounced manual pushbutton RESET input
2
4
TD
Watchdog time delay selection. (tTD = 150ms for TD = GND, tTD = 610ms
for TD = Open, and tTD =1200ms for TD = VCC)
3
6
TOL
Selects 5% (TOL connected to GND) or 10% (TOL connected to VCC) trip
point tolerance
4
8
GND
Ground
5
9
RESET
Active HIGH reset output. RESET is active:
1. If VCC falls below the reset voltage trip point.
2. If PBRST is LOW.
3. If ST is not strobed LOW before the timeout period set by TD expires.
4. During power-up.
6
11
RESET
Active LOW reset output. (See RESET)
7
13
ST
Strobe Input
815
VCC
5V power
—
1, 3, 5, 7, 10,
NC
No internal connection
12, 14, 16



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