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M24C64-FDW5TP 데이터시트(PDF) 25 Page - STMicroelectronics

부품명 M24C64-FDW5TP
상세설명  64-Kbit serial I짼C bus EEPROM
PDF  45 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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M24C64-FDW5TP 데이터시트(HTML) 25 Page - STMicroelectronics

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Table 11. Cycling performance
Symbol
Parameter
Test condition
Max.(1)
1. Cycling performance for products identified by process letter K or T (previous products were specified with
1 million cycles at 25 °C)
Unit
Ncycle
Write cycle
endurance(2)
2. The Write cycle endurance is defined by characterization and qualification. For devices embedding the
ECC functionality (see Chapter 5.1.5), the write cycle endurance is defined for group of four bytes located
at addresses [4*N, 4*N+1, 4*N+2, 4*N+3] where N is an integer.
TA ≤ 25 °C, VCC(min) < VCC < VCC(max)
4,000,000
Write cycle(3)
3. A Write cycle is executed when either a Page Write, a Byte write, a Write Identification Page or a Lock
Identification Page instruction is decoded. When using the Byte Write, the Page Write or the Write
Identification Page, refer also to Section 5.1.5: ECC (Error Correction Code) and Write cycling
TA = 85 °C, VCC(min) < VCC < VCC(max)
1,200,000
Table 12. Memory cell data retention
Parameter
Test condition
Min.
Unit
Data retention(1)
1. The data retention behavior is checked in production, while the data retention limit defined in this table is
extracted from characterization and qualification results.
TA = 55 °C
200(2)
2. For products identified by process letter K or T (previous products were specified with a data retention of 40
years at 55°C).
Year



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