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CD4095BMS 데이터시트(PDF) 6 Page - Intersil Corporation

부품명 CD4095BMS
상세설명  CMOS Gated J-K Master-Slave Flip-Flops
PDF  10 Pages
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제조업체  INTERSIL [Intersil Corporation]
홈페이지  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CD4095BMS 데이터시트(HTML) 6 Page - Intersil Corporation

Back Button CD4095BMS Datasheet HTML 2Page - Intersil Corporation CD4095BMS Datasheet HTML 3Page - Intersil Corporation CD4095BMS Datasheet HTML 4Page - Intersil Corporation CD4095BMS Datasheet HTML 5Page - Intersil Corporation CD4095BMS Datasheet HTML 6Page - Intersil Corporation CD4095BMS Datasheet HTML 7Page - Intersil Corporation CD4095BMS Datasheet HTML 8Page - Intersil Corporation CD4095BMS Datasheet HTML 9Page - Intersil Corporation CD4095BMS Datasheet HTML 10Page - Intersil Corporation  
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Specifications CD4095BMS, CD4096BMS
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
FUNCTION
OPEN
GROUND
VDD
9V
± -0.5V
OSCILLATOR
50kHz
25kHz
CD4095BMS
Static Burn-In 1
Note 1
1, 6, 8
2-5, 7, 9-13
14
Static Burn-In 2
Note 1
1, 6, 8
7
2-5, 9-14
Dynamic Burn-
In Note 1
1
2, 7, 13
3-5, 9-11, 14
6, 8
-
12
Irradiation
Note 2
1, 6, 8
7
2-5, 9-14
CD4096BMS
Static Burn-In 1
Note 1
1, 6, 8
2-5, 7, 9-13
14
Static Burn-In 2
Note 1
1, 6, 8
7
2-5, 9-14
Dynamic Burn-
In Note 1
1
2, 5, 7, 9, 13
3, 4, 10, 11, 14
6, 8
12
Irradiation
Note 2
1, 6, 8
7
2-5, 9-14
NOTES:
1. Each pin except VDD and GND will have a series resistor of 10K
± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K
± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD
= 10V
± 0.5V



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