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CDP1822CDX 데이터시트(PDF) 4 Page - Intersil Corporation

부품명 CDP1822CDX
상세설명  256-Word x 4-Bit LSI Static RAM
PDF  8 Pages
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제조업체  INTERSIL [Intersil Corporation]
홈페이지  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CDP1822CDX 데이터시트(HTML) 4 Page - Intersil Corporation

  CDP1822CDX Datasheet HTML 1Page - Intersil Corporation CDP1822CDX Datasheet HTML 2Page - Intersil Corporation CDP1822CDX Datasheet HTML 3Page - Intersil Corporation CDP1822CDX Datasheet HTML 4Page - Intersil Corporation CDP1822CDX Datasheet HTML 5Page - Intersil Corporation CDP1822CDX Datasheet HTML 6Page - Intersil Corporation CDP1822CDX Datasheet HTML 7Page - Intersil Corporation CDP1822CDX Datasheet HTML 8Page - Intersil Corporation  
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6-14
tDOA1
tDOA2
tDOH1
tRC
tDOH3
tAA
DATA OUT
VALID
HIGH
IMPEDANCE
HIGH
IMPEDANCE
CHIP-SELECT 1
A0 - A7
CHIP-SELECT 2
OUTPUT DISABLE
READ/WRITE
DATA OUT
tDOH2
tDOA3
FIGURE 1. READ CYCLE TIMING WAVEFORMS
Dynamic Electrical Specifications At TA + -40 to +85oC, VDD ±5%, Input tR, tF = 20ns, VIH = 0.7 VDD, VIL = 0.3 VDD,
CL = 100 pF.
PARAMETER
TEST
CONDITIONS
LIMITS
UNITS
CD1822
CDP1822C
VDD
(V)
(NOTE 1)
MIN
(NOTE 2)
TYP
MAX
(NOTE 1)
MIN
(NOTE 2)
TYP
MAX
Read Cycle Times (Figure 2)
Write Cycle
tWC
5
500
-
-
500
-
-
ns
10
300
-
-
-
-
-
ns
Address Setup
tAS
5
200
-
-
200
-
-
ns
10
110
-
-
-
-
-
ns
Write Recovery
tWR
550
-
-
50
-
-
ns
10
40
-
-
-
-
-
ns
Write Width
tWRW
5
250
-
-
250
-
-
ns
10
150
-
-
-
-
-
ns
Input Data Setup Time
tDS
5
250
-
-
250
-
-
ns
10
150
-
-
-
-
-
ns
Data Hold
tDH
550
-
-
50
-
-
ns
10
40
-
-
-
-
-
ns
Chip-Select 1 Setup
tCS1S
5
200
-
-
200
-
-
ns
10
110
-
-
-
-
-
ns
Chip-Select 2 Setup
tCS2S
5
200
-
-
200
-
-
ns
10
110
-
-
-
-
-
ns
CDP1822, CDP1822C



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