CDP68HC68A2 datasheet(3/14 Pages) INTERSIL

3 / 14 page

Absolute Maximum Ratings

Thermal Information

DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . . -0.5V to +7V

(Voltage Referenced to VSS Terminal)

Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to VDD +0.5V

DC Input Current, Any One Input

. . . . . . . . . . . . . . . . . . . . . . . . .±10mA

Operating Conditions (Note 1)

Temperature Ambient, TA . . . . . . . . . . . . . . . . . . . . . . -40

oC to 85oC

DC Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . 3V Min, 6V Max

Thermal Resistance (Typical, Note 2)

θJA (oC/W)

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

104

Maximum Power Dissipation Per Package (PD)

TA = -40

oC to 60oC (Package Type E). . . . . . . . . . . . . . . . 500mW

TA = 60

oC to 85oC (Package Type E)

Derate Linearly at . . . . . . . . . . . . . . . . . . .12mW/oC to 200mW

TA = -40

oC to 70oC (Package Type M) (Note 3) . . . . . . . . 400mW

TA = -70

oC to 85oC (Package Type M) (Note 3)

Derate Linearly at . . . . . . . . . . . . . . . . . . 6.0mW/oC to 310mW

Device Dissipation Per Output Transistor . . . . . . . . . . . . . . . . 40mW

TA = Full Package Temperate Range (All Package Types)

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . 150oC

Maximum Storage Temperature Range (TSTG) . . . . . -65

oC to 150oC

Maximum Lead Temperature (During Soldering) . . . . . . . . . . 265oC

At Distance 1/16

±1/32 In. (1.59 ± 0.79mm)

From Case for 10s Max (SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. For maximum reliability, nominal operating conditions should be selected so that operation is always within the ranges specified.

θJA is measured with the component mounted on an evaluation PC board in free air.

3. Printed circuit board mount: 58mm x 57mm minimum area x 1.6mm thick G10 epoxy glass, or equivalent.

Electrical Speciﬁcation TA = 25

oC, VDD = 5V, Unless Otherwise Speciﬁed.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

ACCURACY

Differential Linearity Error

10-Bit Mode

±1.25

±2

LSB

Integral Linear Error

10-Bit Mode

±1.25

±2

LSB

Offset Error

10-Bit Mode

-1

LSB

Gain Error

10-Bit Mode

-1

LSB

ANALOG INPUTS: AI0 THRU AI7

Input Resistance

In Series with Sample Caps

Ω

Sample Capacitance

During Sample State

400

Input Capacitance

During Hold State

Input Current

At VIN = VREF + During Sample

During Hold or Standby State

+30

µA

±1

µA

Input + Full Scale Range

From Input RC Time Constant

VR = 1

VSS

-VDD

+0.3

Input Bandwidth (3dB)

4.68

MHz

Input Voltage Range: AI0

3.0

VDD

DIGITAL INPUTS: MOSI, SCK, CE, TA = -40

oC to 85oC

High Input Voltage

VIH

VDD = 3 to 6V

% of

VDD

Low Input Voltage

VIL

VDD = 3 to 6V

% of

VDD

Input Leakage

±1

µA

Input Capacitance

TA = 25

oC-

CDP68HC68A2

CDP68HC68A2 데이터시트(PDF) 3 Page - Intersil Corporation

CDP68HC68A2 데이터시트(HTML) 3 Page - Intersil Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14

데이터시트 다운로드

링크 URL