HCS112MS datasheet(1/9 Pages) INTERSIL

부품명	HCS112MS

상세설명	Radiation Hardened Dual JK Flip-Flop

PDF	9 Pages

Scroll/Zoom	100%

제조업체	INTERSIL [Intersil Corporation]

홈페이지	http://www.intersil.com/cda/home

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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Ordering Information

PART NUMBER

TEMPERATURE RANGE

SCREENING LEVEL

PACKAGE

HCS112DMSR

-55oC to +125oC

Intersil Class S Equivalent

16 Lead SBDIP

HCS112KMSR

-55oC to +125oC

Intersil Class S Equivalent

16 Lead Ceramic Flatpack

HCS112D/Sample

+25oC

Sample

16 Lead SBDIP

HCS112K/Sample

+25oC

Sample

16 Lead Ceramic Flatpack

HCS112HMSR

+25oC

Die

HCS112MS

Radiation Hardened

Dual JK Flip-Flop

Pinouts

16 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T16, LEAD FINISH C

TOP VIEW

16 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP4-F16, LEAD FINISH C

TOP VIEW

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

CP1

KA

JA

SA

QA

GND

QB

VCC

RB

CPB

KB

JB

SB

QB

RA

CP1

KA

JA

SA

QA

QB

GND

2

3

4

5

6

7

8

116

15

14

13

12

11

10

9

VCC

RA

RB

CPB

KB

JB

SB

QB

Features

• 3 Micron Radiation Hardened SOS CMOS

• Total Dose 200K RAD (Si)

• SEP Effective LET No Upsets: >100 MEV-cm2/mg

• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/

Bit-Day (Typ)

• Dose Rate Survivability: >1 x 1012 RAD (Si)/s

• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse

• Latch-Up Free Under Any Conditions

• Military Temperature Range: -55oC to +125oC

• Signiﬁcant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 30% of VCC Max

- VIH = 70% of VCC Min

• Input Current Levels Ii

≤ 5µA at VOL, VOH

Description

The Intersil HCS112MS is a Radiation Hardened dual JK

ﬂip-ﬂop with set and reset. The output changes state on the

negative going transition of the clock pulse. Set and reset

are accomplished asynchronously by a logic low input level.

The HCS112MS utilizes advanced CMOS/SOS technology

to achieve high-speed operation. This device is a member of

radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCS112MS is supplied in a 16 lead Ceramic ﬂatpack

(K sufﬁx) or a SBDIP Package (D sufﬁx).

September 1995

Spec Number

518830

File Number

3558.1

유사한 부품 번호 - HCS112MS

제조업체	부품명	데이터시트	상세설명
Intersil Corporation	HCS11MS	160Kb / 6P	Radiation Hardened Triple 3-Input AND Gate November 1994
Renesas Technology Corp	HCS11MS	310Kb / 7P	Radiation Hardened Triple 3-Input AND Gate November 1994

More results

유사한 설명 - HCS112MS

제조업체	부품명	데이터시트	상세설명
NXP Semiconductors	HEF4027B	64Kb / 5P	Dual JK flip-flop January 1995
Intersil Corporation	HCS109MS	171Kb / 9P	Radiation Hardened Dual JK Flip Flop September 1995
	HCTS109MS	170Kb / 9P	Radiation Hardened Dual JK Flip Flop September 1995
	HCTS109T	121Kb / 3P	Radiation Hardened Dual JK Flip Flop July 1999
	HCTS112MS	180Kb / 10P	Radiation Hardened Dual JK Flip-Flop September 1995
Integral Corp.	IW4027B	48Kb / 6P	Dual JK Flip-Flop
KODENSHI_AUK CORP.	KK4027B	232Kb / 6P	Dual JK Flip-Flop
NXP Semiconductors	HEF4027B	83Kb / 13P	Dual JK flip-flop Rev. 05-10 November 2008
Renesas Technology Corp	HCS109MS	403Kb / 9P	Radiation Hardened Dual JK Flip Flop September 1995
Nexperia B.V. All right...	HEF4027B	220Kb / 11P	Dual JK flip-flop Rev. 11 - 7 December 2021

More results

HCS112MS 데이터시트(PDF) 1 Page - Intersil Corporation

HCS112MS 데이터시트(HTML) 1 Page - Intersil Corporation

유사한 부품 번호 - HCS112MS

유사한 설명 - HCS112MS

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