3-437

Configuration Control Register Bit Definitions

CONTROL ADDRESS 0: I CHANNEL INPUT

BIT

POSITION

FUNCTION

DESCRIPTION

15-0

I Channel QASK Input or

FM Input

IIN(15:0). In QASK mode, this is the I input vector. The format is 2’s complement. The MSB is bit 15.

The mixer operation is:

OUT = (I*COS) - (Q*SIN).

In FM mode, this is interpreted as an offset frequency to the center frequency. The modulation index

depends on the mode and the filter coefficients. In FM with post filter mode, the phase change per

input sample can range from -180 to 180 degrees, so the deviation is limited to

±(input sample rate)/2.

CONTROL ADDRESS 1: Q CHANNEL INPUT

BIT

POSITION

FUNCTION

DESCRIPTION

15-0

Q Channel Input

QIN(15:0). In QASK mode, this is the Q input vector. See address 0 above. In FM mode, this input is

not used.

CONTROL ADDRESS 2: TIMING NCO FREQUENCY MSBYTE CONTROL WORD

BIT

POSITION

FUNCTION

DESCRIPTION

15-14

Reserved (Note 1)

Reserved (Note 1).

13-0

Sample Rate Ratio’s

Most Significant 14 Bits

SR(29:16). The sample rate is controlled by a 30-bit NCO clocked at the output clock rate. The upper

MSByte of the sample rate ratio SR(29:0), or SR(29:16), is loaded in this address. The sample rate is

computed by the formula:

CONTROL ADDRESS 3: TIMING NCO FREQUENCY LSBYTE CONTROL WORD

BIT

POSITION

FUNCTION

DESCRIPTION

15-0

Sample Rate Ratio’s

Least Significant 16 Bits

SR(15:0). See Control Address 2. SR(15:0) is loaded in this address.

CONTROL ADDRESS 4: CARRIER CENTER FREQUENCY MSBYTE CONTROL WORD

BIT

POSITION

FUNCTION

DESCRIPTION

15-0

Carrier Center

Frequency’s Most

Significant 16 Bits

CF(31:16). The SIN/COS ROM is controlled by a 32-bit NCO clocked at the input clock rate. The upper

MSByte of the sample rate ratio CF(31:0), or CF(31:16), is loaded in this address. The center frequen-

cy is computed by the formula:

mixers (COS = 1; SIN = 0).

CONTROL ADDRESS 5: CARRIER CENTER FREQUENCY LSBYTE CONTROL WORD

BIT

POSITION

FUNCTION

DESCRIPTION

15-0

Carrier Center

Frequency’s Least

Significant 16 Bits

CF(15:0). See Control Address 4. CF(15:0) is loaded in this address. Setting CW 4 and 5 to zero by-

passes the mixers (COS = 1; SIN = 0).

CONTROL ADDRESS 16: MODULATION CONTROL

BIT

POSITION

FUNCTION

DESCRIPTION

15-4

Reserved (Note 1)

Reserved (Note 1).

3

Enable Output

EN OUT.

HSP50215