ADP1653_15 datasheet(6/24 Pages) AD

6 / 24 page

ADP1653

Rev. B | Page 6 of 24

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

VDD, CTRL0/SDA, CTRL1/SCL, INTF, EN,

SETI, SETT, SETF, STR, HPLED to GND

−0.3 V to +6 V

INT, ILED to GND

−0.3 V to + (VDD + 0.3 V)

LX, OUT to GND

−0.3 V to +12 V

PGND to GND

−0.3 V to +0.3 V

Operating Ambient Temperature Range

−40°C to +125°C1

Operating Junction Temperature

125°C

Storage Temperature Range

−65°C to +150°C

Soldering Conditions

JEDEC J-STD-020

1 In applications where high power dissipation and poor thermal resistance

are present, the maximum ambient temperature may have to be derated.

Maximum ambient temperature (TA(MAX)) is dependent on the maximum

operating junction temperature (TJ(MAXOP) = 125°C), the maximum power

dissipation of the device (PD(MAX)), and the junction-to-ambient thermal

resistance of the part/package in the application (θJA), using the following

equation: TA(MAX) = TJ(MAXOP) − (θJA × PD(MAX)).

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

Absolute maximum ratings apply individually only, not in

combination. Unless otherwise specified, all other voltages

are referenced to GND.

THERMAL RESISTANCE

Junction-to-ambient thermal resistance (θJA) of the package is

based on modeling and calculation using a 4-layer board. The

junction-to-ambient thermal resistance is dependent on the

application and board layout. In applications where high maximum

power dissipation exists, attention to thermal board design is

required. The value of θJA may vary, depending on PCB material,

layout, and environmental conditions. For more information,

see the AN-772 Application Note, A Design and Manufacturing

Guide for the Lead Frame Chip Scale Package (LFCSP).

Table 4. Thermal Resistance

Parameter

Value

Unit

θJA

°C/W

Maximum Power Dissipation

BOUNDARY CONDITION

Natural convection, 4-layer board, exposed pad soldered to

the PCB.

ESD CAUTION

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