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UM1693

Reverse battery protection

195

current in this experiment a 90

Ω generator resistor was chosen. As long as the P-channel

MOSFET is still conducting during the negative pulse, the voltage on VCC pin (VBAT) is

clamped to minus one diode voltage due to the forward biased substrate diode of the HSD.

The P-channel MOSFET is turned off once the VBAT voltage begins to drop. This happens

within few tens of microseconds about. As soon as the VBAT voltage drops to -55 V, the

P-channel MOSFET starts to conduct in avalanche until the pulse amplitude drops below its

breakdown voltage BVDSS = 55 V.

The breakdown voltage BVDSS of the P-channel MOSFET either should be higher than the

maximum negative transient peak voltage of ISO 7637:2-2011(E) or the energy capability of

the P-channel MOSFET in avalanche must be high enough to sustain the transient pulse

energy.

Figure 13. Reverse battery test according to LV 124:2009-10: VN7016AJ-E (13.5 V at

-4 V, 82 m

Ω, R2 = 1kΩ)

Figure 13 shows the example of an abrupt reverse battery test changing the polarity of the

battery supply from 13.5 V to -4 V within a few us. The test setup used a 55 V/16 m

Ω

P-channel MOSFET with a gate resistor R2 = 1 k

Ω. The total line impedance is measured

with 82 m

Ω in line with the requirements of LV 124:2009-10.

The P-channel MOSFET is able to turn-off within 20 µs about. During this time a relatively

high current will flow through the HSD substrate diode. The total energy dissipated in the

HSD is around 600 µJ, which is withstood by the M0-7 HSD family.

2.2.5

Dedicated ST Reverse FET solution

The VN5R003H-E is a device made using STMicroelectronics® VIPower® technology. It is

intended to provide reverse battery protection to an electronic module. This device, which

consists of an N-channel MOSFET and its driver circuit, has two power pins (drain and

source) and a control pin, IN (see Figure 14).

R2 = 1k

VCC - GND stress: ~0.6mJ

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