10F202 datasheet(61/88 Pages) MICROCHIP

61 / 88 page

 2004-2014 Microchip Technology Inc.

DS40001239F-page 61

PIC10F200/202/204/206

12.3

DC Characteristics: PIC10F200/202/204/206 (Industrial, Extended)

DC CHARACTERISTICS

Standard Operating Conditions (unless otherwise specified)

Operating temperature

-40°C

 TA  +85°C (industrial)

-40°C

 TA  +125°C (extended)

Operating voltage VDD range as described in DC specification

Param.

No.

Sym.

Characteristic

Min.

Typ.†

Max.

Units

Conditions

VIL

Input Low Voltage

I/O ports:

D030

with TTL buffer

Vss

—

0.8

For all 4.5V

 VDD 5.5V

D030A

Vss

—

0.15

VDD

D031

with Schmitt Trigger

buffer

Vss

—

0.2 VDD

D032

MCLR, T0CKI

Vss

—

0.2 VDD

VIH

Input High Voltage

I/O ports:

—

D040

with TTL buffer

2.0

—

VDD

V4.5V

 VDD 5.5V

D040A

0.25 VDD + 0.8

—

VDD

VOtherwise

D041

with Schmitt Trigger

buffer

0.8VDD

—VDD

For entire VDD range

D042

MCLR, T0CKI

0.8VDD

—VDD

D070

IPUR

GPIO weak pull-up

current(3)

250

400

AVDD = 5V, VPIN = VSS

IIL

Input Leakage Current(1, 2)

D060

I/O ports

—

±0.1

± 1

AVss VPIN VDD, Pin at

high-impedance

D061

GP3/MCLR(3)

—±0.7

± 5

AVss VPIN VDD

Output Low Voltage

D080

I/O ports

—

0.6

IOL = 8.5 mA, VDD = 4.5V,

-40

C to +85C

D080A

—

0.6

IOL = 7.0 mA, VDD = 4.5V,

-40

C to +125C

Output High Voltage

D090

I/O ports(2)

VDD – 0.7

—

IOH = -3.0 mA, VDD = 4.5V,

-40

C to +85C

D090A

VDD – 0.7

—

IOH = -2.5 mA, VDD = 4.5V,

-40

C to +125C

Capacitive Loading Specs on Output Pins

D101

All I/O pins

—

50*

† Data in “Typ.” column is at 5V, 25

C unless otherwise stated. These parameters are for design guidance

only and are not tested.

These parameters are for design guidance only and are not tested.

Note 1:

The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified

levels represent normal operating conditions. Higher leakage current may be measured at different input

voltages.

Negative current is defined as coming out of the pin.

This specification applies when GP3/MCLR is configured as an input with pull-up disabled. The leakage

current of the MCLR circuit is higher than the standard I/O logic.

10F202 데이터시트(PDF) 61 Page - Microchip Technology

10F202 데이터시트(HTML) 61 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88

데이터시트 다운로드

링크 URL