UM0673

PFC board connection

Doc ID 15337 Rev 2

9/19

The chosen switching devices are two power MOSFETs, MDmesh™ V family,

STW88N65M5. These two power MOSFETs placed in parallel assure a low R

DS(on)

, limiting

the conduction power losses.

Good efficiency and good thermal behavior of the system can be reached.

To properly drive the power MOSFET and to minimize switching losses, during the on and

off transient, a small push-pull driver was interposed between the driver and the two gates.

A reading of the current conducted by the two power MOSFETs, equal to the current on the

main inductor during the T

ON

period, is necessary for the driver to set the right current level

on the inductor according to the input instantaneous voltage and the output power delivered

to the load. This current is sensed by a sensing resistor paralleling two 0,07

Ω non-inductive

sensing resistors. The output DC bus voltage is sensed by the driver through the resistive

net composed of R12, R16, R17, and R24.

As described in the L6563S datasheet, a

PFC pre-regulator output voltage

monitoring/disable function exists. This pin senses the output voltage of the PFC pre-

regulator through a resistor divider and is used for protection purposes. If the voltage at the

pin exceeds 2.5 V, the IC is shut down, its consumption goes almost to the startup level and

this condition is latched. The PWM_LATCH pin is asserted high. Normal operation can be

resumed only by cycling Vcc. This function is used for protection in case the feedback loop

fails.

The RC net, on pin ZCD, is used to fix the desired T

OFF

time according to the sizing

calculation of the application (for complete design rules, please refer to "Design of fixed-off-

time-controlled PFC pre-regulators with the L6562").

The small signal bit Q3 is used to implement a T

OFF

modulation according to the input

voltage. At the moment of low voltage on the input waveform (near the zero-crossing of the

input sinusoidal supply) and in order to minimize the distortion on the input current due to

the low input voltage, the T

OFF

period needs to be reduced. Acting in this way, the ratio

between T

ON

and T

OFF

is increased and the distortion on the input current can be reduced.