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UPD4702C 데이터시트(PDF) 2 Page - NEC |
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UPD4702C 데이터시트(HTML) 2 Page - NEC |
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2 / 16 page ![]() 2 µPD4702 BLOCK DIAGRAM Reset A B Phase Discrimination Edge Detection 8-Bit Up/Down Counter 8-Bit Latch 3-State Output Carry Borrow STB OE CD0–7 PIN FUNCTIONS Function Incremental signal A phase and B phase signal input pins (Schmitt input) Count data output pins. Activated when OE is “L”, high impedance outputs when OE is “H”. 8-bit counter carry signal output pin (active-low) 8-bit counter borrow signal output pin (active-low) 8-bit counter reset signal output pin Counter is reset when this pin is “H”. Count data output control signal input pin Counter data output latch signal. Data is latched on the fall of STB, and is held while STB = “L”. Power supply input pin Ground pin Pin Name Input/Output A, B Input (Schmitt) D0 to 7 Output (3-state) Carry Output Borrow Output RESET Input (Schmitt) OE Input STB Input VDD GND |
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