AN4461 datasheet(14/70 Pages) STMICROELECTRONICS

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PFC stage

AN4461

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DocID026130 Rev 2

technique. The algorithm also adapts the bandwidth to quickly react to fast variation of the

input voltage or output load. The resulting bandwidth is then approximately equal to 5 Hz.

The CPP0 input is used to detect an overvoltage and switches off the PWM once the PFC

voltage is greater than an internally configured safety threshold. The threshold is adjusted

depending on the AC input voltage. Once the PFC output voltage reaches the safety

threshold, the PWM is disabled within ~50 ns.

The PFC is activated 30 mS after power-on or activation. This time is used to sense the

input AC voltage and enable the PFC with the optimal parameters for the given AC voltage.

The STLUX385A also implements a THD optimizer approach (US2013194842 and

US2013194845) via the DIGIN2 pin.

3.4

PFC stage customization

3.4.1

Inductor

The operating frequency of the PFC stage varies along every half cycle of the rectified AC

input voltage and at different load conditions. The inductor value can be selected in order to

obtain an operating frequency greater than a minimum value, normally ranging between

35 kHz and 60 kHz. Equation 2 can be used to select the minimum operating frequency,

using either minimum or maximum VAC value, whichever gives the lower value for L.

Equation 2

The saturation current can be selected slightly higher than the maximum peak current

occurring in correspondence of the peak of the input sine wave at full output power and low

input voltage.

Equation 3

Once obtained these two values, the inductor physical design can be done using one of the

approaches described in some relevant application notes (see AN966 on www.st.com).

3.4.2

Output capacitor

The output capacitor is responsible for reducing the frequency ripple and maximizing the

hold-up time. The operating frequency of the secondary LC stage is strongly dependent on

its input voltage: it is therefore necessary to minimize the PFC output voltage ripple to avoid

very wide frequency variation during the LC half-bridge operations. The capacitor can be

chosen according to Equation 4.

Equation 4

ac ·(Vpfc - v2 Vac)

2 f sw_min · Pin · Vpfc

Boost

min

ac,

Lsat

⋅

pfc

mains

out

pfc

∆V

4π

⋅

≥

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