| 전자부품 데이터시트 검색엔진 |
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AN4209 데이터시트(PDF) 14 Page - STMicroelectronics |
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AN4209 데이터시트(HTML) 14 Page - STMicroelectronics |
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14 / 19 page ![]() Design example AN4209 14/19 DocID023949 Rev 2 3 Design example The case study corresponds to protection of a MOSFET device. Because of stray inductance in series with the power switch STP50NF25, fast transient over voltages appear across it at each switching period. A STRVS device is therefore inserted in parallel to protect the switch. Applications conditions are shown in Table 3: 3.1 STRVS pre-selection Considering a safety margin of 15% VPmax is given by Equation 13. Equation 13 Considering the criteria 1 and 2, several STRVS can be pre-selected as shown in Table 4 3.2 Clamping voltage assessment Since the application requires a surface mount package (SMD) protection, STRVS185X02B is primarily selected. Based on the methodology, the current will be sensed in application with a DO-15 package to minimize the thermal issue. Current and voltage waveforms across the device are shown below during the clamping time. Table 3. Worst case application conditions (maximum values) Voperationmax FSW IPP Tambmax VDSS Package 120 V 100 kHz Unknown 50 °C 250 V SMD Table 4. Possible pre-selected devices Order code VRMmax @ [1 µA, 25 °C] VBRmax @ [1 mA, 25 °C] Tmax @ [1 mA] Package STRVS182X02F/C 128 V 158 V 10.8·10-4/°C DO-201/SMC STRVS185X02B/E 128 V 158 V 10.8·10-4/°C SMB/DO-15 STRVS222X02F 154 V 189 V 10.8·10-4/°C DO-201 STRVS225X02E 154 V 189 V 10.8·10-4/°C DO-15 V V V DSS P 212 85 . 0 max = · = |
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