AN1014 datasheet(21/25 Pages) STMICROELECTRONICS

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HOW TO MINIMIZE THE ST7 POWER CONSUMPTION

ister is cleared and the IS00 bit in the EICR register is set to 1. All Ports are in Push-Pull

Output with low level except PA0 (which is used for charging and discharging the capacitor).

Measurements:

Table 18. Consumption IDD (Wait Mode) for CEXT = 1 uF at TA = + 25 °C

7.2.2.2 Slow-Wait Mode

Methodology: An external CLK source, up to 16MHz is used on pin CLKIN. PLL is disabled

and internal RC Oscillator is OFF. So, fOSC is CLKIN / 2. All peripherals are in reset configura-

tion except the I/O Ports and the SMS bit of in the MCCSR register is set to 1, hence fCPU is

fOSC/32.The IS01 bit in the EICR register is cleared and the IS00 bit in the EICR register is set

to 1. All Ports are in Push-Pull Outputs with low level except PA0 (which is used for charging

and discharging the capacitor).

Measurements:

Table 19. Consumption IDD (Slow-Wait Mode) for CEXT = 1 uF at TA = + 25 °C

7.2.2.3 Halt Mode

Methodology: An external CLK source, up to 16MHz is used on pin CLKIN. PLL is disabled

and internal RC Oscillator is OFF. So, fOSC is CLKIN / 2. All peripherals are in reset configura-

tion except Ports. IS01 bit of EICR is cleared and IS00 bit of EICR is set to 1. All Ports are in

Push-Pull Outputs with low level except PA0 (which is used for charging and discharging the

capacitor).

Measurements:

Table 20. Consumption IDD (Halt Mode) for CEXT = 1 uF at TA = + 25 °C

External CLK

on CLKIN Pin

(MHz)

fCPU(MHz)

IDD at VDD = 4.5 V

IDD at VDD = 5 V

IDD at VDD = 5.5 V

1850

µA

2087uA

2380uA

1195uA

1426uA

1590uA

External CLK

on CLKIN Pin

(MHz)

fCPU(MHz)

IDD at VDD = 4.5 V

IDD at VDD = 5 V

IDD at VDD = 5.5 V

0.25

430uA

526uA

612uA

80.125

293uA

380uA

434uA

0.0625

220uA

280uA

333uA

fCPU(MHz)

IDD at VDD = 4.5 V

IDD at VDD = 5 V

IDD at VDD = 5.5 V

µA115 µA

143

µA

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