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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AN1048D 데이터시트(PDF) 5 Page - STMicroelectronics |
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AN1048D 데이터시트(HTML) 5 Page - STMicroelectronics |
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5 / 21 page  AN1048 LCD drive signals 5/21 0 or VDD levels and to high impedance input mode for VDD/2. When one backplane is active, the other one is neutralised by applying VDD/2 to it. This VDD/2 voltage is defined by two resistors of equal value, externally connected to the I/O pin. By using an MCU with flexible I/O pin configuration, a duplexed LCD drive can be implemented with only 2 external resistors bridge (each on two com lines). Figure 3. Basic LCD Segment Connection in duplexed mode Figure 4. LCD signals for duplexed mode (used in the ST7 example) COM1 COM2 S1 S11 S12 S2 S3 COM1 S11=COM1-S1 +Vdd S12=COM2-S1 S1 +Vdd +Vdd COM2 CASE1 CASE2 CASE3 CASE4 +Vdd/2 +Vdd/2 -Vdd +Vdd +Vdd/2 -Vdd/2 -Vdd +Vdd +Vdd/2 -Vdd/2 SEGMENT1 SEGMENT2 OFF ON ON OFF OFF OFF ON ON |
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