전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

AN1278 데이터시트(PDF) 39 Page - STMicroelectronics

부품명 AN1278
상세설명  Many mechanical components in the automotive sector have been replaced
PDF  44 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN1278 데이터시트(HTML) 39 Page - STMicroelectronics

Back Button AN1278 Datasheet HTML 35Page - STMicroelectronics AN1278 Datasheet HTML 36Page - STMicroelectronics AN1278 Datasheet HTML 37Page - STMicroelectronics AN1278 Datasheet HTML 38Page - STMicroelectronics AN1278 Datasheet HTML 39Page - STMicroelectronics AN1278 Datasheet HTML 40Page - STMicroelectronics AN1278 Datasheet HTML 41Page - STMicroelectronics AN1278 Datasheet HTML 42Page - STMicroelectronics AN1278 Datasheet HTML 43Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 39 / 44 page
background image
39/44
LIN (LOCAL INTERCONNECT NETWORK) SOLUTIONS
4.4.2.1 Reception
The SCI is emulated by software using the input capture and output compare of the on-chip
16-bit timer. When the bus is idle, the software waits for a negative edge: The input capture in-
terrupt is activated and calls the LIN interrupt when a negative edge occurs. The input capture
time is used to generate an output compare in the middle of this first bit. The LIN interrupt rou-
tine returns to the calling program. When the output compare event occurs the LIN interrupt is
called again. The bus level is checked and a new output compare is set to occur in the middle
of the next bit. This last process is repeated until the stop bit.
As a result the application software should not:
– delay the occurrence of the IC interrupt too much. Specifically: A problem occurs if the first
output compare is set after the expected occurrence of the output compare event, which is
the middle of the bit. So as long as the IC interrupt ends before the middle of the bit, the delay
is acceptable. See Figure 18.
Figure 18. IC Interrupt Handing in Reception Mode
– Delay the occurrence of each OC interrupt too much. Specifically: A problem occurs if the
sample time defined at the beginning of the interrupt is delayed so that it occurs after the end
of the bit. See Figure 19.
start bit
application task
IC request IC interrupt served
deadline for
end of IC interrupt
1/2
1/2



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com