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AN2556 데이터시트(PDF) 13 Page - STMicroelectronics

부품명 AN2556
상세설명  Porting an application from the ST10F269Zx to the ST10F273Z4
PDF  35 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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AN2556 데이터시트(HTML) 13 Page - STMicroelectronics

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AN2556
Modified features
13/35
Port1 additional channels
A new multiplexer selects between up to 16 + 8 analog input channels (alternate functions of
Port 5 and Port1). The selection of Port1 or Port5 as inputs of ADC is made via the
ADCMUX bit and bit 0 of XMISC register. By default the multiplexer selects Port5, so there is
no impact on the software with regard to ST10F269Zx implementation. Note that XMISCEN
and bit 10 of the XPERCON register must be set in order to have access to the XMISC
register.
1.5
Real time clock
The RTC module can be clocked by two different sources: The main oscillator (pins XTAL1
and XTAL2) or the 32 kHz low power oscillator (pins XTAL3 and XTAL4). Selection of the
clocking can be made via an additional bit in the RTCCON register.
1.5.1
Hardware impacts
Check the usage of pins XTAL3 and XTAL4 (143 and 144 respectively).
1.5.2
Software impacts
The address range of the RTC registers have been modified from 00’EC00h - 00’ECFFh on
the ST10F269Zx to 00’EE00h - 00’EEFFh on ST10F273Z4. This relocation has no impact if
the software uses register names defined by the toolchain and if the CPU selection is
changed to ST10F273Z4. If the software was using the address of the RTC register directly,
it must be modified according to new mapping.
In the ST10F269Zx, both byte and word accesses were allowed for the RTC module. In the
ST10F273Z4, only word accesses are possible.
Check that the code is not creating byte accesses to the RTC module.
In addition, new bits(OFF32, OSC) have been added into the RTCCON register. There is no
impact if the code was not writing to the upper part of the RTCCON register which was
reserved.
The handling of the RTCAIR and RTCSIR flags (bit 2 and 0 of RTCCON register
respectively) is also changed:
XMISC (EB46h)
XREG
Reset value: --00h
15
14
13
12
11
10
9876
54
3210
Reserved
VREG
OFF
CAN
CK2
CAN
PAR
ADC
MUX
-
RWRWRWRW
Table 8.
XMISC register: ADCMUX bit
Bit
Function
ADCMUX
ADC Multiplexer
0: Default configuration, analog inputs on ports P5.y can be converted.
1: Analog inputs on port P1.z can be converted, only 8 channels can be
managed.



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