Run and low power modes

AN3147

14/25

DocID17035 Rev 3

4.3

Slowing down the clock frequency

In Run mode, choosing the clock frequency is very important to ensure the best compromise

between performance and consumption. The selection is done by programming the

prescaler registers. These prescalers can also be used to slow down peripherals before

entering low power modes.

Note:

Keep in mind the recommendations given in Section 3.4 about performance and ratio

between Run mode and Halt mode operation.

4.4

Peripheral clock gating (PCG)

You can use peripheral clock gating (PCG) for additional power saving. This can be done at

any time by selectively enabling or disabling the clock connection to individual peripherals

through the CLK_PCKENRx registers. These settings are effective both in Run and Wait

modes.

Note:

As all peripheral clocks are gated on STM8L and STM8AL devices after reset, it is

mandatory to enable the clock for a given peripheral before accessing any peripheral

register.

4.5

Execution from RAM

The code can be executed from RAM in order to save power consumption. However, due to

the difference between size of data & instruction bus from Flash (32-bit) and RAM (8-bit),

the performance is degraded when the execution is done from RAM. This is important to

take into account the performance and the ratio between Run/Halt operations.

The following figure shows the different bus widths for Flash and RAM memories.