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AN3240 데이터시트(PDF) 17 Page - STMicroelectronics |
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AN3240 데이터시트(HTML) 17 Page - STMicroelectronics |
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17 / 32 page ![]() AN3240 Operating supply conditions Doc ID 17689 Rev 1 17/32 5.2 Fixed STHV748 pins on PCB demo In order to clarify some special pin behavior, a short explanation is given: EN allows the minimizing of the power consumption. If EN=0, the self-voltage reference is not supplied. By supplying the reference externally, the total power consumption is reduced. THSD is a thermal flag. The output stage of the THSD pin is a Nch-MOS open-drain, so it is necessary to connect the external pull-up resistance (R2 ≥10 kΩ) to the positive low-voltage supply (see Figure 2). If the internal temperature surpasses 160 °C, THSD goes down and puts all the channels into HZ state. By externally forcing THSD to a positive low-voltage supply, the thermal protection is disabled. D_CTR can be used to optimize 2nd HD performance by tuning the fall propagation delay (TDF - see the datasheet, STHV748; 5-level, ±90 V, 2 A high speed pulser with four independent channels). If D_CTR is equal to ground, TDF has the nominal value. If D_CTR is being varied from 2 V to 4.2 V, TDF can be changed from -1 ns to +600 ps, with respect to the nominal value. EXPOSED-PAD is internally connected to the substrate. It can be floating or connected to a 100 V capacitance toward ground, in order to reduce noise during the receiving phase. The fixed configuration of the PCB application pins described is given in Table 8. Table 8. Special pin connections Special pins on the PCB demo Name Description Status on board EN 64-pin Enable pin With EN=1, the IC internally generates the reference voltages on REF_HVP1/0 (7, 10, 39, 42-pin) and REF_HVM1/0 (2, 15, 34, 47-pin). These voltages are set VDDP below HVP and VDDP above HVM, respectively: REF_HVM# = HVM# + VDDP REF_HVP# = HVP# - VDDP When EN=0, it is required that an external voltage is applied to REF_HVM# and REF_HVP# pins (see the STHV748 datasheet). Active – forced to 3 V through R1=10 k Ω THSD 32-pin Thermal shutdown pin Active – forced to 3 V through R2=10 k Ω. The user can monitor the THSD status on TP1 (test point) D_CTR 16-pin Delay control pin Not active – forced directly to ground EXPOSED-PAD Substrate Not active – connected to ground through Cs1=0.22 µF |
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