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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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UPD70732 데이터시트(PDF) 49 Page - NEC |
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UPD70732 데이터시트(HTML) 49 Page - NEC |
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49 / 66 page  49 µPD70732 Memory, I/O Access Parameter Symbol Test Conditions µPD70732-25 Unit MIN. MAX. Address etc. output delay time (from CLK ↑)tDKA 125 ns Address etc. output hold time (from CLK ↑)tHKA 125 ns BCYST output delay time (from CLK ↑)tDKBC 125 ns BCYST output hold time (from CLK ↑)tHKBC 125 ns DA output delay time (from CLK ↑)tDKDA 125 ns DA output hold time (from CLK ↑)tHKDA 125 ns READY setup time (to CLK ↓)tSRYK 8ns READY hold time (from CLK ↓)tHKRY 5ns Data setup time (to CLK ↑)tSDK 8ns Data hold time (from CLK ↑)tHKD 5ns Data output delay time (from active, from CLK ↓) tDKDT 135 ns Data output hold time (to active, from CLK ↓)tHKDT 135 ns Data output delay time (from float, from CLK ↓) tLZKDT 340 ns Data output hold time (to float, from CLK ↓)tHZKDT 340 ns Dynamic Bus Sizing Parameter Symbol Test Conditions µPD70732-25 Unit MIN. MAX. SZRQ setup time (to CLK ↓)tSSZK 8ns SZRQ hold time (from CLK ↓)tHKSZ 5ns Interrupt Parameter Symbol Test Conditions µPD70732-25 Unit MIN. MAX. NMI setup time (to CLK ↓)tSNK 8ns NMI hold time (from CLK ↓)tHKN 5ns INT etc. setup time (to CLK ↑)tSIK 8ns INT etc. hold time (from CLK ↑)tHKI 5ns |
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