PM0214 datasheet(234/245 Pages) STMICROELECTRONICS

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Core peripherals

PM0214

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DocID022708 Rev 4

4.5.4

SysTick calibration value register (STK_CALIB)

Address offset: 0x0C

Reset value: 0x0000000

Required privilege: Privileged

The CALIB register indicates the SysTick calibration properties.

4.5.5

SysTick design hints and tips

The SysTick counter runs on the processor clock. If this clock signal is stopped for low

power mode, the SysTick counter stops.

Ensure software uses aligned word accesses to access the SysTick registers.

The SysTick counter reload and current value are undefined at reset, the correct

initialization sequence for the SysTick counter is:

Program reload value.

Clear current value.

Program Control and Status register.

3029

REF

SKEW

Reserved

TENMS[23:16]

rrrr

TENMS[15:0]

rrrr

Bit 31

NOREF: NOREF flag. Reads as zero. Indicates that a separate reference clock is provided.

The frequency of this clock is HCLK/8.

Bit 30

SKEW: SKEW flag: Indicates whether the TENMS value is exact. Reads as one. Calibration

value for the 1 ms inexact timing is not known because TENMS is not known. This can affect

the suitability of SysTick as a software real time clock.

Bits 29:24

Reserved, must be kept cleared.

Bits 23:0

TENMS[23:0]: Calibration value. Indicates the calibration value when the SysTick counter

runs on HCLK max/8 as external clock. The value is product dependent, please refer to the

Product Reference Manual, SysTick Calibration Value section. When HCLK is programmed at

the maximum frequency, the SysTick period is 1ms.

If calibration information is not known, calculate the calibration value required from the

frequency of the processor clock or external clock.

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