DocID024966 Rev 1

11/27

AN4325

Power supplies and reset sources of the STM32F030 family

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Low-power mode security reset

To prevent that critical applications mistakenly enter a low-power mode, two low-power

mode security resets are available. If enabled in Option bytes, the resets are generated in

the following conditions:

1.

Entering Standby mode: This type of reset is enabled by resetting nRST_STDBY bit in

User Option Bytes. In this case, whenever a Standby mode entry sequence is

successfully executed, the device is reset instead of entering Standby mode.

2.

Entering Stop mode: This type of reset is enabled by resetting nRST_STOP bit in User

Option Bytes. In this case, whenever a Stop mode entry sequence is successfully

executed, the device is reset instead of entering Stop mode.

Option byte loader reset

The option byte loader reset is generated when OBL_LAUNCH (bit 13) is set in the

FLASH_CR register. This bit launches the option byte loading by software.

Power reset

A power reset sets all registers to their reset values, except the RTC domain.

The power reset is generated when one of the following events occurs.

1.

Power-on/power-down reset (POR/PDR reset)

2.

Exiting Standby mode

RTC domain reset

An RTC domain reset only affects the RTC, LSE and LSI. It is generated when one of the

following events occurs.

1.

Software reset, triggered by setting the BDRST bit in the RTC domain control register

(RCC_BDCR).

2.

Power-on/power-down reset (POR/PDR reset)