LT1074/LT1076

12

Figure 10. Error Amplifier

DESCRIPTIO S

PI

A

G

fC

at mid frequencies

A

G

R at high frequencies

V

m

C

Vm

C

=

••

=•

2

π

drops back to 0

° (actually 180° since FB is an inverting

f

rC

rk

POLE

O

O

=

••

≈Ω

1

2

400

π

specified much tighter on the data sheet. The higher

f

RC

ZERO

CC

=

••

1

2

π

The error amplifier has asymmetrical peak output current.

Q3 and Q4 current mirrors are unity-gain, but the Q6

mirror has a gain of 1.8 at output null and a gain of 8 when

the FB pin is high (Q1 current = 0). This results in a

maximum positive output current of 140

µA and a maxi-

mum negative (sink) output current of

≅1.1mA.Theasym-

metry is deliberate—it results in much less regulator

output overshoot during rapid start-up or following the

release of an output overload. Amplifier offset is kept low

by area scaling Q1 and Q2 at 1.8:1.

Amplifier swing is limited by the internal 5.8V supply for

positive outputs and by D1 and D2 when the output goes

low. Low clamp voltage is approximately one diode drop

(

≈0.7V – 2mV/°C).

connections. Refer to the frequency shifting and synchro-

nizing discussions.

140 A

µ

Q1

LT1074 • PD11

Q2

FB

V

50 A

µ

90 A

µ

Q6

300

C

Q4

5.8V

Q3

50 A

µ

2.21V

EXTERNAL

FREQUENCY

COMPENSATION

90 A

µ

D1

90 A

µ

Ω

D2

X1.8

ALL CURRENTS SHOWN ARE AT NULL CONDITION