14

LT1509

An LT1431 reference/amplifier coupled to a low cost

optoisolator closes the loop from secondary side to pri-

mary side. Unity loop frequency is a conservative 3kHz.

Figure 10 shows the output voltage’s response with a 2A

to almost 10A current step. Output voltage is maintained

to within 0.5V during the load step. Efficiency versus

power and line voltage is shown in Figure 11. The PFC

preregulator alone has efficiency numbers between 90%

and 97% over line and load.

A 3-turn secondary added to the 70-turn primary of T1

requirement as well as about 39mA to cover the gate

current of the three FETs and high side transformer. A

0.15

Ω sense resistor is used to sense input current and

servo to the command created by the outer voltage and

multiplier. Thus the input current follows the input line

voltage, and changes as necessary, in order to maintain

constant bank voltage. The forward converter sees a

voltage input of 382VDC unless the line voltage drops out,

in which case the 470

µF main capacitor discharges to

240VDC before the PWM stage is shut down. Compared to

a typical off-line converter, the effective input voltage

range of the forward converter is much smaller, simplify-

ing the design. Additionally, the higher bus voltage pro-

vides greater hold-up times for given capacitor size.

Because the high side transformer effectively delays the

turn-on reverse recovery spike past the end of the built-in

blanking time, an external blanking transistor is needed.

Controlling the output current during an output short

circuit depends on the duty cycle reducing to a small

fraction of steady state. An additional transistor disables

blanking during turn-on and output short circuit.

5A/DIV

0.5V/DIV

Figure 10

Figure 11

90

80

85

250

LT1509 • F11

75

70

132

180

90

200W/300W

100W

30W