13

LT1510/LT1510-5

PmA

mA

mA

W

PW

BIAS

DRIVER

=

()

+

()( )

=









()

=

35

15

15

84

84

15

75

0012 12

017

12 84

1

84

30

55 15

013

2

2

..

.

.

..

.

.

..

.

.

P

kHz

W

PW

SW

SENSE

)( )

+







)

=+

=

=

−

12

035 8 4

15

10 10

15 1 2 200

028 0 04

032

018 1 2

0 26

2

9

2

..

.

•.

..

.

..

.

Total power in the IC is:

0.17 + 0.13 + 0.32+ 0.26 = 0.88W

Temperature rise will be (0.88W)(50

°C/W) = 44°C. This

assumes that the LT1510 is properly heat sunk by con-

necting the four fused ground pins to the expanded traces

and that the PC board has a backside or internal plane for

heat spreading.

diode D2 (see Figures 2 and 6 circuits) to a lower system

Then,

P

IV

V

V

V

DRIVER

BAT

BAT

X

X

IN

=









()

1

30

55

P

AVV

V

V

W









()

=

12

84

33

1

33

30

55 15

0 045

..

.

.

.

P

V

W

V

mA

DRIVER

X

==

0 045

33

14

.

.

Total board area becomes an important factor when the

area of the board drops below about 20 square inches. The

graph in Figure 9 shows thermal resistance vs board area

for 2-layer and 4-layer boards. Note that 4-layer boards

have significantly lower thermal resistance, but both types

show a rapid increase for reduced board areas. Figure 10

shows actual measured lead temperature for chargers

operating at full current. Battery voltage and input voltage

will affect device power dissipation, so the data sheet

power calculations must be used to extrapolate these

readings to other situations.

Vias should be used to connect board layers together.

Planes under the charger area can be cut away from the

rest of the board and connected with vias to form both a

BOARD AREA (IN

0

60

55

50

45

40

35

30

25

15

25

1510 F08

510

20

30

35

S16, MEASURED FROM AIR AMBIENT

TO DIE USING COPPER LANDS AS

SHOWN ON DATA SHEET

2-LAYER BOARD

4-LAYER BOARD

Figure 9. LT1510 Thermal Resistance

BOOST

SW

SENSE

1510 F07

LT1510

C1

L1

D2

10

µF

+

Figure 8