10

LT1572

OPERATIO

Synchronizing

The LT1572 can be externally synchronized in the fre-

quency range of 120kHz to 160kHz. This is accomplished

as shown in the accompanying figures. Synchronizing

transistor. To avoid disturbing the DC characteristics of

the internal error amplifier, the width of the synchronizing

pulse should be under 0.3

µs. C2 sets the pulse width at ≅

0.2

µs. The effect of a synchronizing pulse on the LT1572

amplifier offset can be calculated from:

∆V

KT

q

tf

I

V

R

I

OS

SS

C

C

C

=







+









3

KT

= 26mV at 25

°C

q

R3 = resistor used to set mid-frequency “zero”

in frequency compensation network.

voltage shift is

≈3.8mV. This is not particularly bother-

some, but note that high offsets could result if R3 were

reduced to a much lower value. Also, the synchronizing

transistor must sink higher currents with low values of R3,

so larger drives may have to be used. The transistor must

to ensure synchronizing.

Synchronizing with Bipolar Transistor

1572 OP01

C2

39pF

R1

3k

R2

2.2k

LT1572

GND

C1

R3

2N2369

FROM 5V

LOGIC

Synchronizing with MOS Transistor

1572 OP02

D1

1N4158

R2

2.2k

LT1572

GND

C1

R3

FROM 5V

LOGIC

C2

100pF

D2

1N4158

*SILICONIX OR EQUIVALENT

VN2222*