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LT1949

–

RAMP

GENERATOR

1.24V

REFERENCE

BIAS

ENABLE

200mV

A = 2

COMPARATOR

ERROR

AMPLIFIER

0.06

Ω

DRIVER

GND 1949 BD

600kHz

OSCILLATOR

LBO

LBI

SHDN

SHUTDOWN

(EXTERNAL)

VOUT

(EXTERNAL)

Figure 3. LT1949 Block Diagram

The LT1949 is a current mode, fixed frequency step-up

DC/DC converter with an internal 1A NPN power transis-

tor. Operation can best be understood by referring to the

Block Diagram.

At the beginning of each oscillator cycle, the flip-flop is set

and the switch is turned on. Current in the switch ramps

up until the voltage at A2’s positive input reaches the VC

pin voltage, causing A2’s output to change state and the

switch to be turned off. The signal at A2’s positive input is

a summation of a signal representing switch current and

a ramp generator (introduced to avoid subharmonic oscil-

lations at duty factors greater than 50%). If the load

increases, VOUT (and FB) will drop slightly and the error

amplifier will drive VC to a higher voltage, causing current

in the switch to increase. In this way, the error amplifier

drives the VC pin to the voltage necessary to satisfy the

load. Frequency compensation is provided by an external

series RC network connected between the VC pin and

ground.

Layout Hints

The LT1949 switches current at high speed, mandating

careful attention to layout for proper performance.

You

will not get advertised performance with careless layouts.

Figure 4 shows recommended component placement for

a boost (step-up) converter. Follow this closely in your PC

layout. Note the direct path of the switching loops. Input

capacitor C1

must be placed close (< 5mm) to the IC

package. As little as 10mm of wire or PC trace from CIN to

VIN will cause problems such as inability to regulate or

oscillation.

The ground terminal of output capacitor C2 should tie

close to Pin 4 of the LT1949. Doing this reduces dI/dt in the

ground copper which keeps high frequency spikes to a

minimum. The DC/DC converter ground should tie to the

PC board ground plane at one place only, to avoid intro-

ducing dI/dt in the ground plane.

BLOCK DIAGRA

OPERATIO

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