LTC1235CS datasheet(4/16 Pages) LINER

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LTC1235

PARAMETER

CONDITONS

MIN

TYP

MAX

UNITS

RESET and WDO Output Voltage

ISINK = 1.6mA, VCC = 5V

0.4

(Note 6)

SOURCE = 1µA, VCC = 4.25V

3.5

RESET, RESET, WDO, LOW LINE

Output Source Current

µA

Output Short Circuit Current (Note 6)

Output Sink Current

WDI Input Threshold

Logic Low

0.8

Logic High

2.0

WDI Input Current

WDI = VOUT

450

µA

WDI = 0V

–50

–8

Power Fail Detector

PFI Input Threshold

VCC = 5V

1.25

1.3

1.35

PFI Input Threshold PSRR

0.3

mV/V

PFI Input Current

±0.01

±25

PFO Output Voltage (Note 6)

ISINK = 3.2mA

0.4

ISOURCE = 1µA

3.5

PFO Short Circuit Source Current

PFI = HIGH, PFO = 0V

µA

(Note 6)

PFI = LOW, PFO = VOUT

PFI Comparator Response Time (falling)

∆VIN = –20mV, VOD = 15mV

µs

PFI Comparator Response Time (rising)

∆VIN = 20mV, VOD = 15mV

µs

(Note 6)

with 10k

Ω Pullup

Chip Enable Gating

CE IN Threshold

VIL

0.8

VIH

2.0

CE IN Pullup Current (Note 4)

µA

CE OUT Output Voltage

ISINK = 3.2mA

0.4

ISOURCE = 3.0mA

VOUT – 1.50

ISOURCE = 1µA, VCC = 0V

VOUT – 0.05

CE Propagation Delay

VCC = 5V, CL = 20pF

CE OUT Output Short Circuit Current

Output Source Current

Output Sink Current

VCC = Full Operating Range, VBATT = 2.8V, Backup = No Connection, TA = 25°C, unless otherwise noted.

ELECTRICAL C

HARA TERISTICS

The q denotes specifications which apply over the operating temperature

range.

Note 1: Absolute maximum ratings are those values beyond which the life

of device may be impaired.

Note 2: All voltage values are with respect to GND.

Note 3: For military temperature range parts, consult the factory.

Note 4: The input pins of PB RST, BACKUP and CE IN, have weak internal

pullups which pull to the supply when the input pins are floating.

Note 5: The LTC1235 can be programmed either to provide or not to

provide battery backup power to the VOUT pin during power failure. The

power down condition of VOUT is selected by the logic level of the BACKUP

pin which is latched internally when VCC falls through the reset voltage

threshold. If the latched logic level of the BACKUP pin is high, VOUT will be

in Battery Backup Mode and will be switched to VBATT when VCC falls

below VBATT. If the latched logic level of the BACKUP pin is low, VOUT will

be in Battery Saving Mode when VCC falls below VBATT.

Note 6: The output pins of BATT ON, LOW LINE, PFO, WDO, RESET and

RESET have weak internal pullups of typically 3

µA. However, external

pullup resistors may be used when higher speed is required.

Note 7: The push-button reset input requires an active low signal.

Internally, this input signal is debounced and timed for a minimum of

40ms. When this condition is satisfied, the reset outputs go to the active

states. The reset outputs will remain in active states for a minimum of

140ms from the moment the push-button reset input is released from

logic low level.

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