전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

LTC1480IS8 데이터시트(PDF) 6 Page - Linear Technology

부품명 LTC1480IS8
상세설명  3.3V Ultra-Low Power RS485 Transceiver
PDF  8 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  LINER [Linear Technology]
홈페이지  http://www.linear.com
Logo LINER - Linear Technology

LTC1480IS8 데이터시트(HTML) 6 Page - Linear Technology

  LTC1480IS8 Datasheet HTML 1Page - Linear Technology LTC1480IS8 Datasheet HTML 2Page - Linear Technology LTC1480IS8 Datasheet HTML 3Page - Linear Technology LTC1480IS8 Datasheet HTML 4Page - Linear Technology LTC1480IS8 Datasheet HTML 5Page - Linear Technology LTC1480IS8 Datasheet HTML 6Page - Linear Technology LTC1480IS8 Datasheet HTML 7Page - Linear Technology LTC1480IS8 Datasheet HTML 8Page - Linear Technology  
Zoom Inzoom in Zoom Outzoom out
 6 / 8 page
background image
6
LTC1480
SWITCHI G TI E WAVEFOR S
Figure 6. Driver Enable and Disable Times
1.5V
2.3V
2.3V
tZH(SHDN), tZH
tZL(SHDN), tZL
1.5V
tLZ
0.5V
0.5V
tHZ
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
3V
0V
DE
3.3V
VOL
VOH
0V
A, B
A, B
LTC1480 • F06
f = 1MHz, tr ≤ 10ns, tf ≤ 10ns
Figure 7. Receiver Propagation Delays
1.5V
tPHL
RO
–VOD2
A – B
0V
0V
1.5V
tPLH
OUTPUT
INPUT
VOD2
VOL
VOH
LTC1480 • F07
f = 1MHz, tr ≤ 10ns, tf ≤ 10ns
Figure 8. Receiver Enable and Disable Times
1.5V
tZL(SHDN), tZL
tZH(SHDN), tZH
1.5V
1.5V
1.5V
tLZ
0.5V
0.5V
tHZ
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
3V
0V
RE
3.3V
VOL
VOH
0V
RO
RO
LTC1480 • F08
f = 1MHz, tr ≤ 10ns, tf ≤ 10ns
APPLICATIO S I FOR ATIO
CMOS Output Driver
The LTC1480 transceiver provides full RS485 compatibil-
ity while operating from a single 3.3V supply. The RS485
specification requires that a transceiver withstand com-
mon-mode voltages of up to 12V or –7V at the RS485 line
connections. Additionally, the transceiver must be im-
mune to both ESD and latch-up, This rules out traditional
CMOS drivers, which include parasitic diodes from their
driver outputs to each supply rail (Figure 9). The LTC1480
uses a proprietary process enhancement which adds a
pair of Schottky diodes to the output stage (Figure 10),
preventing current from flowing when the common-mode
LOGIC
VCC
P1
D1
OUTPUT
D2
N1
LTC1480 • F10
LOGIC
VCC
SD3
P1
D1
OUTPUT
SD4
D2
N1
LTC1480 • F09
Figure 9. Conventional
CMOS Output Stage
Figure 10.
LTC1480 Output Stage



Html Pages

1 2 3 4 5 6 7 8


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com