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LTC1659CS8 데이터시트(PDF) 6 Page - Linear Technology |
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LTC1659CS8 데이터시트(HTML) 6 Page - Linear Technology |
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6 / 12 page ![]() 6 LTC1659 PIN FUNCTIONS CLK (Pin 1): Serial Interface Clock. Internal Schmitt trig- ger on this input allows direct optocoupler interface. DIN (Pin 2): Serial Interface Data. Data on the DIN pin is latched into the shift register on the rising edge of the serial clock. CS/LD (Pin 3): Serial Interface Enable and Load Control. When CS/LD is low the CLK signal is enabled, so the data can be clocked in. When CS/LD is pulled high, data is loaded from the shift register into the DAC register, updating the DAC output and the CLK is disabled internally. DOUT (Pin 4): Output of the Shift Register which Becomes Valid on the Rising Edge of the Serial Clock. GND (Pin 5): Ground. REF (Pin 6): Reference Input. This pin can be tied to VCC. The output will swing from 0V to REF. The typical input resistance is 28k. VOUT (Pin 7): Buffered DAC Output. VCC (Pin 8): Positive Supply Input. 2.7V ≤ VCC ≤ 5.5V. Requires a bypass capacitor to ground. I DAGRA BLOCK DAC REGISTER LD 12-BIT SHIFT REGISTER POWER-ON RESET 1659 BD CLK 1 DIN 2 DOUT 4 VOUT 7 REF 6 GND 5 VCC 8 3 CS/LD 12-BIT DAC + – |
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