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RFDA0066

DS141218

7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical

support, contact RFMD at (+1) 336-678-5570 or customerservice@rfmd.com.

SPI Timing Diagram Specifications

Power-up Programming Truth Table

Logic Voltage Table

PUP

Attenuator Setting

State

Logic

Low

Attenuation at Max, 31.5dB

Low

0V to 0.8V

High

Attenuation at Min, 0dB

High

2.0 to 5.0V

Parameter

Limit

Unit

Comment

t1

25

MHz max

CLK Frequency

t2

20

ns min

CLK High

t3

20

ns min

CLK Low

t4

5

ns min

DATA to CLK Setup Time

t5

5

ns min

DATA to CLK Hold Time

t6

30

ns min

DATA Valid

t7

5

ns min

LE to CLK Setup Time

t8

5

ns min

CLK to LE Setup Time

t9

10

ns min

LE Pulse Width

t10

20

ns max

Output Set

CLK

DATA

t6

LE

t1

t2

t3

t4

t5

t7

t8

DOUT

t9

SPI Timing Diagram

t10