NJG1521PE1R1-R3 datasheet(7/17 Pages) NJRC

7 / 17 page

NJG1521PE1

- 7 -

nTERMINAL INFORMATION

PIN No.

SYMBOL

DESCRIPTIONS

VDD

Positive voltage supply terminal. The positive voltage (+2.7~+5.0V) have to be

supplied. Please connect a bypass capacitor with GND terminal for excellent RF

performance.

CTL1

High-impedance C-MOS input terminal. This terminal is set to High-

Level(+2V~VDD) or Low-Level(+0.6V~0V). If the voltage level of this terminal is

unstable, please connect a resistor(100k

Ω) with GND terminal or V

DD terminal.

CTL2

High-impedance C-MOS input terminal. This terminal is set to High-

Level(+2V~VDD) or Low-Level(+0.6V~0V). If the voltage level of this terminal is

unstable, please connect a resistor(100k

Ω) with GND terminal or V

DD terminal.

CTL3

High-impedance C-MOS input terminal. This terminal is set to High-

Level(+2V~VDD) or Low-Level(+0.6V~0V). If the voltage level of this terminal is

unstable, please connect a resistor(100k

Ω) with GND terminal or V

DD terminal.

VSS

Negative voltage supply terminal. Please supply negative voltage of -3.5~-2.0V

on transmitting state. On receiving state, this terminal is internally disconnected,

so the voltage of this terminal(negative, short, or open) does not affect to

receiving signal quality. The bypass capacitor should be connected between this

terminal and GND for excellent RF performance.

EXT2

RF receiving port. An external capacitor of 56pF~100pF is required to block DC

voltage (VDD).

EXT1

RF transmitting/receiving port. An external capacitor of 56pF~100pF is required

to block DC voltage (VDD).

RF transmitting port. An external capacitor of 56pF~100pF is required to block

DC voltage (VDD).

TER2

ANT2 termination port. Please connect this port and GND by appropriate

capacitor(10pF) to suppress the interference of ANT1 port signal to ANT2 port.

The capacitor works as DC voltage (VDD) blocking.

ANT2

RF receiving port. An external capacitor(56pF~100pF) is required to block DC

voltage (VDD) .

ANT1

RF transmitting/receiving port. An external capacitor(56pF~100pF) is required to

block DC voltage (VDD) .

RF receiving port. An external capacitor(56pF~100pF) is required to block DC

voltage (VDD) .

TER1

ANT1 termination port. Please connect this port and GND by appropriate

capacitor(5pF) to suppress the interference of ANT2 port signal to ANT1 port.

The capacitor works as DC voltage (VDD) blocking. .

3, 7, 9, 11,

13,16, 18,

20, 22,23,

GND

Ground terminal. Please connect this terminal with ground plane as close as

possible for excellent RF performance.

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