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LP78071 데이터시트(PDF) 14 Page - Lowpower Semiconductor inc |
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LP78071 데이터시트(HTML) 14 Page - Lowpower Semiconductor inc |
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14 / 16 page ![]() Preliminary Datasheet LP78071 LP78071 – 00 Version 1.0 Feb.-2014 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 14 of 16 PCB Layout Considerations It is important to pay special attention to the PCB layout. The following provides some guidelines: • To obtain optimal performance, the decoupling capacitor from Vin to GND and the output filter capacitors from OUT to GND should be placed as close as possible to the LP78071, with short trace runs to GND pins. • All low-current GND connections should be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small-signal ground path and the power ground path. • The high-current charge paths into IN and from the OUT pins must be sized appropriately for the maximum charge current in order to avoid voltage drops in these traces. |
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