Input Capacitance

Multirange, Single +5V, 12-Bit DAS

with 12-Bit Bus Interface

4

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

V

2.4

4.18

Input Voltage Range

µA

400

Input Current

4.18V

1

V

REFADJ Threshold for

Buffer Disable

Normal, or STANDBY power-down mode

k

Ω

10

Input Resistance

FULL power-down mode

5

M

Ω

Normal, or STANDBY

power-down mode

FULL power-down mode

Internal acquisition

3.0

5.0

External reference = 4.096V

After FULLPD or STBYPD

External acquisition (Note 9)

CONDITIONS

FULL power-down mode (Note 7)

5

µs

3.0

Acquisition Time

LSB

±0.1

PSRR

Power-Supply Rejection Ratio

(Note 8)

3.0

External CLK

µs

V

4.75

5.25

Supply Voltage

6.0

Conversion Time

6.0

7.7

10.0

To 0.1mV REF bypass

capacitor fully discharged

ms

8

Reference Buffer Settling

60

120

60

Normal mode, bipolar ranges

700

850

Normal mode, unipolar ranges

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

STANDBY power-down mode

mA

18

Supply Current

610

µA

Internal reference

MHz

1.25

1.56

2.00

Internal Clock Frequency

0.1

2.0

External Clock Frequency Range

MHz

External CLK

Internal CLK

Power-up (Note 10)

µs

200

Bandgap Reference

Start-Up Time

External CLK

ksps

100

Throughput Rate

62

15

pF

(Note 5)

Input Leakage Current

±10

µA

Input Low Voltage

0.8

V

Input High Voltage

2.4

V

POWER REQUIREMENTS

TIMING

REFERENCE INPUT (buffer disabled, reference input applied to REF pin)

DIGITAL INPUTS (D7–D0, CLK, RD, WR, CS) (Note 11)