STC5455 datasheet(34/56 Pages) CONNOR-WINFIELD

34 / 56 page

Page 34 of 56 TM121

Rev:P1.3

Date: October 24, 2011

STC5455

Synchronous Clock for SETS

Data sheet

Preliminary

SRCSW_States, 0x1E (R)

Indicates states of pin SRCSW.

0 = Low; 1 = High

T0/T4_Tag_Select, 0x1F (R/W)

Selects register between T0 and T4 for the sharing registers 0x20 ~ 0x3F.

0 = T0; 1 = T4

Default value: 0

Control_Mode, 0x20 (R/W)

Mode control for individual timing generator.

Internal Test

0 = Normal operation; 1~3= Reserved

HO_Usage

Determines which holdover history is used.

0 = Device Holdover History (DHH); 1 = User specified history

Revertive

Selects the revertive mode or non-revertive mode of the auto selector.

0 = Non-revertive; 1 = Revertive

Ref_Sel_Mode

Determines reference selection mode.

0 = Manual; 1 = Auto

This bit may be overrided by bit7 of this register.

SAP

In manual mode, when the selected reference is out of pull-in range, as specified in register Disqualification

Range, SAP determine whether clock output will follow the reference input

0 = Follow, 1 = Stop following at pull-in range boundary

Hard-wired_Switch (T0 timing generator only)

0 = Not hard-wired Switch, selects reference in manual selection mode or auto selection mode;

1 = Hard-wired Switch, selects reference in hard-wired manual selection mode by using control pin

Address

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x1E

Not used

Pin states

Address

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x1F

Not used

Tag_Select

Address

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x20

Hard-wired_Switch

Not used

SAP

Ref_Sel_Mode

Revertive

HO_Usage

Internal Test

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