Digital Interface

The multiplexer architecture of the MAX4310–MAX4315

ensures that no two input channels are ever connected

together. Channel selection is accomplished by apply-

ing a binary code to channel address inputs. The

address decoder selects input channels, as shown in

Table 2. All digital inputs are CMOS compatible.

High-Speed Evaluation Board

Figures 10 and 11 show the evaluation board and pre-

sent a suggested layout for the circuits. This board was

developed using the techniques described in the

Layout and Power-Supply Bypassing section of this

data sheet. The smallest available surface-mount resis-

tors were used for feedback and back-termination to

minimize their distance from the part, reducing the

capacitance associated with longer lead lengths.

SMA connectors were used for best high-frequency

performance. Inputs and outputs do not match a 75

Ω

line, but this does not affect performance since dis-

tances are extremely short. However, in applications

that require lead lengths greater than one-quarter of the

wavelength of the highest frequency of interest, use

constant-impedance traces.

Fully assembled evaluation boards are available for the

MAX4313 in an SO package.

High-Speed, Low-Power, Single-Supply,

Multichannel, Video Multiplexer-Amplifiers

16

______________________________________________________________________________________

MAX4313

0.1

µF

75

Ω

8

OUT

3

+4V TO +10.5V

IN1

IN0

5

4

16

2

7

A0

75

Ω

500

Ω

GND

500

Ω

VIDEO

OUTPUT

75

Ω CABLE

Typical Operating Circuit

Chip Information

TRANSISTOR COUNT: 156