ICS83940DYI REVISION C MARCH 20, 2013

18

©2013 Integrated Device Technology, Inc.

ICS83940DI Data Sheet

LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS/LVTTL FANOUT BUFFER

Revision History Sheet

Rev

Table

Page

Description of Change

Date

A

T2

2

7

3.3V Output Load AC Test Circuit diagram - corrected GND equation to read

-1.65V... from -1.165V...

Added LVTTL to title.

Updated format.

12/12/02

A

T8

1

9

10

13

Features Section - added Lead-Free bullet.

Application Information Section - added Recommendations for Unused Input and

Output Pins.

Application Information Section - added LVPECL Clock Input Interface.

Ordering Information Table - added Lead-Free part number, marking, and note.

Updated datasheet format.

11/27/06

A

3

Absolute Maximum Ratings - corrected Storage Temperature from

"-40°C to 125°C" to "-65°C to 150°C".

2/21/07

B

T6B

T7B

T8

1

13

14

16

17

Added 32 Lead VFQFN Pin Assignment.

Added VFQFN Thermal Release Path section.

Added 32 VFQFN Thermal Table.

Added 32 Lead VFQFN Package and Dimensions Table.

Ordering Information Table - added 32 Lead VFQFN ordering information.

Converted datasheet format.

8/13/09

C

T2

2

11

16

Updated Wiring the Differential Input to Accept Single-Ended Levels.

Updated 32 VFQFN Package Outline.

9/7/10

C

T8

17

Removed leaded orderables from Ordering Information table

11/27/12

C

1, 14,16

Deleted “PROPOSED” stamp

3/20/13