ICS831752I Data Sheet

CLOCK SWITCH FOR ATCA/AMC AND PCIe APPLICATIONS

ICS831752AGI REVISION A JUNE 28, 2012

11

©2012 Integrated Device Technology, Inc.

2.5V Differential Clock Input Interface

The CLK/nCLK accepts HCSL, LVDS and LVPECL and other

for the CLK/nCLK input driven by the most common driver types. The

input interfaces suggested here are examples only. If the driver is

from another vendor, use their termination recommendation. Please

consult with the vendor of the driver component to confirm the driver

termination requirements. The figures below also apply to FCLK/

nFCLK operating as an input.

Figure 4A. CLK/nCLK Input Driven by a 2.5V LVPECL

Driver

Figure 4C. CLK/nCLK Input Driven by a 2.5V LVPECL

Driver

Figure 4E. CLK/nCLK Input Driven by a 2.5V LVDS Driver

Figure 4B. CLK/nCLK Input Driven by a 2.5V HCSL Driver

Figure 4D. CLK/nCLK Input Driven by a 2.5V LVPECL

Driver with AC Couple

CLK

nCLK

Differential

Input

LVPECL

2.5V

Zo = 50

Ω

Zo = 50

Ω

2.5V

R1

50

Ω

R2

50

Ω

R3

18

Ω

R3

250

Ω

R4

250

Ω

R1

62.5

Ω

R2

62.5

Ω

2.5V

Zo = 50

Ω

Zo = 50

Ω

CLK

nCLK

2.5V

2.5V

LVPECL

Differential

Input

2.5V

R1

100

Ω

LVDS

CLK

nCLK

2.5V

Differential

Input

Zo = 50

Ω

Zo = 50

Ω

HCSL

*R3

33

Ω

*R4

33

Ω

CLK

nCLK

2.5V

2.5V

Zo = 50

Ω

Zo = 50

Ω

Differential

Input

R1

50

Ω

R2

50

Ω

*Optional – R3 and R4 can be 0

Ω

R1

125

R2

125

R5

100 - 200

R6

100 - 200

CLK

nCLK

2.5V LVPECL

2.5V

Zo = 50

Ω

Zo = 50

Ω

2.5V

Differential

Input

C1

C2

R3

84

R4

84

2.5V