HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR

S-1323 Series

Seiko Instruments Inc.

13

3. ON/OFF pin

This pin starts and stops the regulator.

When the ON/OFF pin is set to OFF level, the entire internal circuit stops operating, and the built-in

P-channel MOS FET output transistor between the VIN pin and the VOUT pin is turned off, reducing

resistance of several hundreds k

Ω between the VOUT pin and the VSS pin.

The structure of the ON/OFF pin is as shown in Figure 13. Since the ON/OFF pin is neither pulled down

nor pulled up internally, do not use it in the floating status. In addition, note that the current consumption

pin, connect it to the VSS pin in the product A type, and connect it to the VIN pin in B type.

Table 6

Product Type

ON/OFF Pin

Internal Circuit

VOUT Pin Voltage

Current Consumption

A

“L”: ON

Operate

Set value

A

“H”: OFF

Stop

B

“L”: OFF

Stop

B

“H”: ON

Operate

Set value

VSS

ON/OFF

VIN

Figure 13



The S-1323 Series requires an output capacitor between the VOUT pin and VSS pin for phase

compensation. A ceramic capacitor with a capacitance of 1.0

μF or more can be used. When using an OS

capacitor, a tantalum capacitor, or an aluminum electrolytic capacitor, the capacitance must be 1.0

μF or

more, and the ESR must be 10

Ω or less.

The value of the output overshoot or undershoot transient response varies depending on the value of the

output capacitor.

When selecting the output capacitor, perform sufficient evaluation, including evaluation of temperature

characteristics, on the actual device.