PA7468G-S16-R datasheet(2/6 Pages) UTC

2 / 6 page

PA7468

Preliminary

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

2 of 6

www.unisonic.com.tw

QW-R502-322.b

PIN CONFIGURATION

MUTE

SHUTDOWN

RIN-

BYPASS

GND

LIN-

VOLUME

VOLMAX

LOUT-

VDD

LOUT +

GND

SE/BTL

ROUT+

VDD

ROUT-

PIN DESCRIPTION

PIN NO.

PIN NAME

DESCRIPTION

MUTE

Input pin for mute controlling: low for normal operation; high to mute.

SHUTDOWN

When this pin is pulled low the chip will be into shutdown mode. ISD= 1μA

RIN-

Right channel input pin

BYPASS

Pin for bias voltage generator

5.12

GND

Ground

LIN-

Left channel input pin

VOLUME

Volume gain setting input signal.

VOLMAX

Pin for setting the maximum output swing. Inputting VC to this pin, the output

voltage swing will be clamped between VOH- VC & VOL + VC. Connecting GND to

this pin will disable the function.

For this pin, the max input voltage must be ≤1/2 VDD.

LOUT-

Left channel’s negative output in BTL mode; high impedance in SE mode.

10, 15

VDD

Supply voltage

LOUT+

Left channel’s positive output in BTL mode and SE mode

SE/ BTL

Output mode control input, high :SE output mode ,low :for BTL mode.

ROUT+

Right channel’s positive output in BTL mode and SE mode

ROUT-

Right channel’s negative output in BTL mode ;high impedance in SE mode.

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