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HIP4082IPZ 데이터시트(PDF) 7 Page - Intersil Corporation

부품명 HIP4082IPZ
상세설명  80V, 1.25A Peak Current H-Bridge FET Driver
PDF  14 Pages
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제조업체  INTERSIL [Intersil Corporation]
홈페이지  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HIP4082IPZ 데이터시트(HTML) 7 Page - Intersil Corporation

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7
FN3676.5
September 30, 2015
HIP4082
Pin Descriptions
PIN
NUMBER
SYMBOL
DESCRIPTION
1
BHB
B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap
diode and positive side of bootstrap capacitor to this pin.
2
BHI
B High-side Input. Logic level input that controls BHO driver (Pin 16). BLI (Pin 3) high level input overrides BHI high
level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 8) high level input overrides BHI high level
input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD).
3
BLI
B Low-side Input. Logic level input that controls BLO driver (Pin 14). If BHI (Pin 2) is driven high or not connected
externally then BLI controls both BLO and BHO drivers, with dead time set by delay currents at DEL (Pin 5). DIS (Pin
8) high level input overrides BLI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than
VDD).
4
ALI
A Low-side Input. Logic level input that controls ALO driver (Pin 13). If AHI (Pin 7) is driven high or not connected
externally then ALI controls both ALO and AHO drivers, with dead time set by delay currents at DEL (Pin 5). DIS (Pin
8) high level input overrides ALI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than
VDD).
5
DEL
Turn-on DELay. Connect resistor from this pin to VSS to set timing current that defines the dead time between drivers.
All drivers turn-off with no adjustable delay, so the DEL resistor guarantees no shoot-through by delaying the turn-on
of all drivers. The voltage across the DEL resistor is approximately Vdd -2V.
6VSS
Chip negative supply, generally will be ground.
7
AHI
A High-side Input. Logic level input that controls AHO driver (Pin 10). ALI (Pin 4) high level input overrides AHI high
level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 8) high level input overrides AHI high level
input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD).
8
DIS
DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs. When
DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to 15V (no
greater than VDD).
9
AHB
A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap
diode and positive side of bootstrap capacitor to this pin.
10
AHO
A High-side Output. Connect to gate of A High-side power MOSFET.
11
AHS
A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of bootstrap
capacitor to this pin.
12
VDD
Positive supply to control logic and lower gate drivers. De-couple this pin to VSS (Pin 6).
13
ALO
A Low-side Output. Connect to gate of A Low-side power MOSFET.
14
BLO
B Low-side Output. Connect to gate of B Low-side power MOSFET.
15
BHS
B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of bootstrap
capacitor to this pin.
16
BHO
B High-side Output. Connect to gate of B High-side power MOSFET.
HIP4082



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