August 1, 2000

11

MIC74

MIC74

Micrel

Alert Response Address

(master requests address

of interupting device)

P0*

/ALERT

Slave Address

(interrupting MIC74

announces its address)

Master-to-slave transmission

Slave-to-master response

STOP

ACKNOWLEDGE

R/W = READ

NOT ACKNOWLEDGE

* Assumes P0 interrupts properly configured and

enabled. P0 used as an example. Timing for P1

to P7 is identical.

Figure 7. Interrupt Handling Using the Alert Response Address

/A P

XXXXXXXX

11 A

A

Slave Address

(host addresses an MIC74)

P0*

/ALERT

Command Byte

(MIC74 sends status)

Slave Address

(host addresses an MIC74)

Master-to-slave transmission

Slave-to-master response

ACKNOWLEDGE

R/W = WRITE

R/W = READ

STOP

NOT ACKNOWLEDGE

* Assumes P0 interrupts properly configured and

enabled. P0 used as an example. Timing for P1

to P7 is identical.

operation.

ACKNOWLEDGE

ACKNOWLEDGE

Figure 8. Interrupt Handling Without the Alert Response Address