4

ClockWorks™

PRELIMINARY

SY89801A

Micrel

The following table lists the various PCLK and RCLK

ratios supported by the SY89801A and the corresponding

PCLK, RCLK, FB and VCO frequencies. The table is

arranged in order of increasing PCLK:RCLK ratio. The

table was designed to balance several constraints:

VCO

FSEL <2:0>

PCLK:RCLK

fPCLK (MHz)

fRCLK (MHz)

VCO/P:VCO/R

fVCO (MHz)

000

1:1

100-132

100-132

8:8

800-1056

001

4:3

133.3-176

100-132

6:8

800-1056

010

3:2

150-198

100-132

4:6

600-792

011

5:3

166.7-220

100-132

6:10

1000-1320

100

2:1

200-264

100-132

4:8

800-1056

101

1:1

100-132

100-132

6:6

600-792

110

1:1

100-132

100-132

10:10

1000-1320

111

n/a

n/a

n/a

n/a

n/a

APPLICATIONS INFORMATION

PRODUCT ORDERING CODE

Ordering

Package

Operating

Code

Type

Range

SY89801AMC

M44-1

Commercial

M44-1

Commercial

LOOP FILTER COMPONENT SELECTION

R

C1

filp

filn

R

= 500

Ω ±10%

C1 = 1000pF

±10%

NOTES:

1. "A" denotes enhanced 200MHz testing.

s 2.5:1 VCO frequency range

s Maximum system frequency of 120MHz plus 10%

margin

s Maximum output frequency of 264MHz