24LCS61/62

DS21226A-page 6

Preliminary

© 1997 Microchip Technology Inc.

4.0

FUNCTIONAL DESCRIPTION

The 24LCS61/62 supports a bi-directional 2-wire bus

protocol. The device is configured to reside on a com-

on the bus. Each device has a unique serial number

assigned to it when delivered from the factory. In an

actual system, this serial number will be used to assign

a separate 8-bit ID byte to each device in the system.

After an ID byte is assigned to each device in the sys-

tem, standard read and write commands can be sent to

each device individually.

4.1

Device Serial Number

The device serial number is stored in a 48-bit (6 byte)

register that is separate from the data array. The serial

number register is non-volatile and cannot be changed

by the user. Before shipment from the factory, this reg-

ister is programmed with a unique value for every

device. The 48 bit register allows for 2.8

combinations. The serial number is used at power-up to

assign the device an ID byte which is then used for all

standard read and write commands sent to that specific

device.

4.2

Device ID Byte

The Device ID byte is an 8-bit value that provides the

means for every device on the bus to be accessed indi-

vidually. The ID byte is stored in a RAM register sepa-

rate from the data array. The ID byte register will always

default to address 00 upon power-up.

4.3

Device Addressing

Each command to the device must begin with a start

bit. A control byte is the first byte received following the

start condition from the master device (Figure 4-1). The

control byte consists of a four-bit control code, the OE

bit, and three command select bits. For the 24LCS61/

62, the control code is set to 0110 binary for all opera-

tions. The device will not acknowledge any commands

sent with any other control code. The next bit is the Out-

put Enable (OE) bit. This bit controls the operation of

the EDS pin. See Section 9.0 for more details. The last

three bits of the control byte are the command select

bits (C0-C2). The command select bits determine

which command will be executed. See Table 4-1. Fol-

lowing a valid control byte, the 24LCS61/62 will

acknowledge the command.

FIGURE 4-1:

CONTROL BYTE FORMAT

TABLE 4-1:

COMMAND CODES

Command

Command Select Bits

(C2 C1 C0)

Set Write Protection Fuse

000

Read

001

Write (Byte or Page)

010

Assign Address

100

Clear Address

110

1

01

0

OE

C2

C1

SACK

Control Code

Command Select

Bits

Acknowledge Bit

Start Bit

C0

Output Enable

Bit