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SCS152-IW 데이터시트(PDF) 13 Page - Microchip Technology

부품명 SCS152-IW
상세설명  KEELOQ Token Card Chip
PDF  16 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

SCS152-IW 데이터시트(HTML) 13 Page - Microchip Technology

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SCS152
© 1997 Microchip Technology Inc.
Preliminary
DS40150B-page 13
8.0
DEVICE CHARACTERISTICS
TABLE 8-1:
ABSOLUTE MAXIMUM RATINGS
Description
Symbol
Min.
Max.
Units
Supply voltage, with respect to GND
VDD
-0.3
6.0
V
Input voltage, with respect to GND
VI
-0.3
6.0
V
Storage temperature
TS
-55
+85
°C
ESD protection on all pins (HBM)
VESD
—
4000
V
TABLE 8-2:
DC CHARACTERISTICS
VDD: 5.0 V
± 10%
TA:
-40
°C to +85°C
Description
Symbol
Min.
Typ.
Max.
Units
Condition
Current when reading
IDDR
—
300
600
µA
SDIO = VDD
Current when programming
IDDP
—
1.2
1.6
mA
SDIO = VDD
Input low voltage
VIL
—
—
0.8
V
Input high voltage
VIH
3.0
—
—
V
Output low voltage
VOL
—
—
0.4
V
Sinking current, Io = 1 mA
TABLE 8-3:
AC CHARACTERISTICS
VDD: 5 V
± 10%
TA:
-40
°C to +85°C
RPU = 10K
Description
Symbol
Min.
Typ.
Max.
Units
Time from VDD high until device accepts com-
mands
TPOR
—
—
3.5
ms
Overlap of SCI with SCK during RESET
TOX
2.0
—
—
µs
Overlap period of SCI and SCK during RESET
TR
35.0
—
—
µs
SCK high
TH
10.0
—
—
µs
SCK low
TL
10.0
—
—
µs
SCK/SCI falling to SCI changing for BITPROG,
ERASE, etc.
TC
5.0
—
—
µs
SCI high pulse during BITPROT, ERASE, etc.
TS
2.0
—
—
µs
SDIO changing from falling edge of SCI/SCK
during RESET
TD1
—
1.8
—
µs
SDIO changing from falling edge of SCK during
RDBIT
TD2
—
1.8
4.7
µs
SDIO tri-state after rising edge of SCK
TD3
4.5
—
µs
Time to program EEPROM during BITPROG,
ERASE, DECR-ERASE, etc.
TPROG
1.4
—
3.4
ms
Time to compute signature from falling edge of
SCK where last challenge bit is entered
TSIGN
—
—
2.5
ms



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