© 2002 Microchip Technology Inc.

DS21457B-page 7

TC7116/A/TC7117/A

3.0

DETAILED DESCRIPTION

(All Pin Designations Refer to 40-Pin PDIP.)

3.1

Analog Section

Figure 3-1 shows the block diagram of the analog sec-

tion for the TC7116/TC7116A and TC7117/TC7117A.

Each measurement cycle is divided into three phases:

(1) Auto-Zero (AZ), (2) Signal Integrate (INT), and

(3) Reference Integrate (REF), or De-integrate (DE).

3.1.1

AUTO-ZERO PHASE

High and low inputs are disconnected from the pins and

internally shorted to analog common. The reference

capacitor is charged to the reference voltage. A feed-

back loop is closed around the system to charge the

ages in the buffer amplifier, integrator, and comparator.

Since the comparator is included in the loop, AZ accu-

racy is limited only by system noise. The offset referred

to the input is less than 10

µV.

3.1.2

SIGNAL INTEGRATE PHASE

The auto-zero loop is opened, the internal short is

removed, and the internal high and low inputs are con-

nected to the external pins. The converter then inte-

for a fixed time. This differential voltage can be within a

wide Common mode range: 1V of either supply. How-

ever, if the input signal has no return with respect to the

common to establish the correct Common mode volt-

age. At the end of this phase, the polarity of the

integrated signal is determined.

35

43

V+

Positive Power Supply Voltage.

36

44

The analog input required to generate a full scale output (1999 counts). Place

100mV between Pins 32 and 36 for 199.9mV full scale. Place 1V between

Pins 35 and 36 for 2V full scale. See Section 4.6, Reference Voltage.

37

3

TEST

Lamp test. When pulled HIGH (to V+), all segments will be turned on and the dis-

play should read -1888. It may also be used as a negative supply for externally

generated decimal points. See Section 3.1.7, TEST for additional information.

38

4

OSC3

See Pin 40.

39

6

OSC2

See Pin 40.

40

7

OSC1

Pins 40, 39, 38 make up the oscillator section. For a 48kHz clock (3 readings per

section), connect Pin 40 to the junction of a 100k

Ω resistor and a 100pF capaci-

tor. The 100k

Ω resistor is tied to Pin 39 and the 100pF capacitor is tied to Pin 38.

TABLE 2-1:

PIN FUNCTION TABLE (CONTINUED)

Pin Number

(40-Pin PDIP)

(40-Pin CERDIP)

Pin Number

(44-Pin PQFP)

Symbol

Description