ML2037CS datasheet(2/10 Pages) MICRO-LINEAR

2 / 10 page

ML2037

PIN CONFIGURATION

PIN DESCRIPTION

NAME

FUNCTION

1, 5

D GND

Ground connection for the digital

sections of the IC.

SYNC

Synchronization input. Holding this

pin low stops the sine wave output,

and resets the phase to zero.

CLK OUT

Output of the internal high frequency

clock generator. fCLK OUT = ½fCLK IN.

S CLK

Serial data clock input. Serial data is

clocked into the shift register on

falling edges of S CLK.

S DATA IN

Serial data input for programming the

output frequency.

S ENABLE

Serial interface enable control. A

logic high on this pin allows data to be

entered into the latch.

SHDN

A logic high on this pin causes the

output of the generator to shut off and

places the IC in a low power standby

mode.

NAME

FUNCTION

A GND

Ground reference for analog sections

of the IC and reference for OUT.

OUT

Sine wave output. The amplitude of

the sine wave will vary around a 2.5V

DC level.

11,12 AVCC

Power supply for the analog sections of

the IC.

CLK IN

Input of the internal high frequency

clock generator. This pin is either

driven from an external clock input or

connected to a crystal for use with the

internal oscillator.

Output gain control. Works with G1 to

set the output amplitude to one of four

different full scale ranges.

Output gain control. Works with G0 to

set the output amplitude to one of four

different full scale ranges.

DVCC

Power supply for the digital sections of

the IC.

D GND

SYNC

CLK OUT

S CLK

D GND

S DATA IN

S ENABLE

SHDN

DVCC

CLK IN

AVCC

OUT

A GND

TOP VIEW

ML2037

16-Pin PDIP (P16)

16-Pin Wide SOIC (S16W)

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