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ML4622CS 데이터시트(PDF) 6 Page - Micro Linear Corporation

부품명 ML4622CS
상세설명  Fiber Optic Data Quantizer
PDF  8 Pages
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제조업체  MICRO-LINEAR [Micro Linear Corporation]
홈페이지  http://www.microlinear.com
Logo MICRO-LINEAR - Micro Linear Corporation

ML4622CS 데이터시트(HTML) 6 Page - Micro Linear Corporation

  ML4622CS Datasheet HTML 1Page - Micro Linear Corporation ML4622CS Datasheet HTML 2Page - Micro Linear Corporation ML4622CS Datasheet HTML 3Page - Micro Linear Corporation ML4622CS Datasheet HTML 4Page - Micro Linear Corporation ML4622CS Datasheet HTML 5Page - Micro Linear Corporation ML4622CS Datasheet HTML 6Page - Micro Linear Corporation ML4622CS Datasheet HTML 7Page - Micro Linear Corporation ML4622CS Datasheet HTML 8Page - Micro Linear Corporation  
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ML4622, ML4624
Figure 1. The ML4622, ML4624 Configured for 20MHz Bandwidth
FUNCTIONAL DESCRIPTION
AMPLIFIER
The ML4622, ML4624 have an adjustable Bandwidth
limiting amplifier. Maximum sensitivity is achieved
through the use of a DC restoration feedback loop and
AC coupling the input. When AC coupled, the input DC
bias voltage is set by an on-chip network at about 1.7V.
These coupling capacitors, in conjunction with the input
impedance of the amplifier, establish a high pass filter
with a 3dB corner frequency, fL, at
f =
1
2 1600C
L
π
(1)
Since the amplifier has a differential input, two capacitors
of equal value are required. If the signal driving the input
is single ended, one of the coupling capacitors can be tied
to VCC as shown in figure 1.
CF1 and CF2 create a low pass filter with the corner
frequency determined by the following equation
f =
1
2 8
C + 4pF)
H
π 00(
(2)
The above equation applies when a single capacitor is
tied between CF1 and CF2. When using two capacitors of
equal value (Cap1 from CF1 to VCC, Cap2 from CF2 to
VCC) the value derived for C should be doubled.
Although the input is AC coupled, the offset voltage
within the amplifier will be present at the amplifier’s
output. This is represented by VOS in figure 2. In order to
reduce this error a DC feedback loop is incorporated. This
negative feedback loop nulls the offset voltage, forcing
VOS to be zero. Although the capacitor on VDC is non-
Figure 2.
VOUT+
VOUT–
VOS
Note:
If TTL OUT is used, tie GND TTL to unfiltered ground and remove L1. If TTL OUT and ECL outputs are both used, add 3K pulldown resistors at
ECL outputs.
ECL+
ECL–
TTL OUT
CMP ENABLE
VCC
TTL*
VCC
GND
GND
TTL
TTL LINK MON
VIN–
VIN+
VDC
VREF
VTHADJ
CF1
CF2
THRESH
GEN
REF
CTIMER
*ML4624 ONLY
BIAS
ECL
CMP
TTL
CMP
AMP
LINK DETECT
+VRF
0.1
+
4.7
0.1
+5V
+
4.7
L1
4.7µH
L2
4.7µH
HFBR
2416
1
4
5
8
7
+VRF
–VRF
10
Ω
2
6
0.01
0.01
0.1
–VRF
0.1
–VRF
5pF
FIBER OPTIC CABLE
0.05
∫
3



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