ML4832

7

AVERAGE CURRENT AND OUTPUT VOLTAGE

REGULATION

The PWM regulator in the PFC control section will act to

offset the positive voltage caused by the multiplier output

by producing an offsetting negative voltage on the current

sense resistor at IA+. A cycle-by-cycle current limit is

included to protect the MOSFET from high speed current

transients. When the voltage at IA+ goes negative by more

than 1V, the PWM cycle is terminated.

For more information on compensating the average

current and boost voltage error amplifier loops, see

ML4821 data sheet.

OVERVOLTAGE PROTECTION AND INHIBIT

The OVP pin serves to protect the power circuit from

being subjected to excessive voltages if the load should

change suddenly (lamp removal). A divider from the high

voltage DC bus sets the OVP trip level. When the voltage

on EA–/OVP exceeds 2.75V, the PFC transistors are

inhibited. The ballast section will continue to operate.

TRANSCONDUCTANCE AMPLIFIERS

The PFC voltage feedback, PFC current sense, and the

loop current amplifiers are all implemented as operational

transconductance amplifiers. They are designed to have

low small signal forward transconductance such that a

large value of load resistor (R1) and a low value ceramic

capacitor (<1µF) can be used for AC coupling (C1) in the

frequency compensation network. The compensation

network shown in Figure 2 will introduce a zero and a

pole at:

f

RC

f

RC

ZP

==

1

2

1

2

11

1 2

ππ

(2)

Figure 3 shows the output configuration for the operational

transconductance amplifiers.

transconductance amplifiers will introduce an offset error.

–

+

18

2.5V

R1

C1

C2

Figure 2. Compensation Network

CURRENT

MIRROR

IN

OUT

CURRENT

MIRROR

IN

OUT

IQ +

2

IQ –

2

Linear Slope Region

0

Figure 3. Output Configuration

Figure 4. Transconductance Amplifier Characteristics